CP1WAD041 Omron Automation, CP1WAD041 Datasheet - Page 18
![no-image](/images/no-image-200.jpg)
CP1WAD041
Manufacturer Part Number
CP1WAD041
Description
Analog Input Unit
Manufacturer
Omron Automation
Type
I/Or
Datasheet
1.CP1WCIF01.pdf
(52 pages)
Specifications of CP1WAD041
Application
Logic Control
Brand/series
CP1
Function
Automation Control
Input Type
Analog
Mounting Type
DIN Rail or Panel
Primary Type
Expansion
Termination
Screw Terminals
Lead Free Status / Rohs Status
RoHS Compliant part
For Use With
Micro Controllers
■ Characteristics
● CP1H
Item
Control method
I/O control method
Program language
Function blocks
Instruction length
Instructions
Instruction execution time
Common processing time
Program capacity
Number of tasks
Maximum subroutine number 256
Maximum jump number
I/O areas
(See note.)
Work bits
TR Area
Holding Area
AR Area
Timers
Counters
DM Area
Data Register Area
Index Register Area
Task Flag Area
Trace Memory
Memory Cassette
Clock function
Communications functions
Memory backup
Battery service life
Built-in input terminals
Number of connectable
Expansion (I/O) Units
Max. number of I/O points
Interrupt inputs
Interrupt input counter mode
Quick-response inputs
Scheduled interrupts
Scheduled inter-
rupt tasks
Input interrupt
tasks
Input bits
Output bits
Built-in Analog
Inputs
Built-in Analog
Outputs
Serial PLC Link
Area
Models
Type
Stored program method
Cyclic scan with immediate refreshing
Ladder diagram
Maximum number of function block definitions: 128 Maximum number of instances: 256
Languages usable in function block definitions: Ladder diagrams, structured text (ST)
1 to 7 steps per instruction
Approx. 500 (function codes: 3 digits)
Basic instructions: 0.10 μs min. Special instructions: 0.15 μs min.
0.7 ms
20K steps
288 (32 cyclic tasks and 256 interrupt tasks)
1 (interrupt task No. 2, fixed)
8 (interrupt task No. 140 to 147, fixed)
(Interrupt tasks can also be specified and executed for high-speed counter interrupts.)
256
1,600 bits (100 words): CIO 0.00 to CIO 99.15 (The 24 built-in inputs are allocated in CIO 0.00 to CIO 0.11 and CIO 1.00 to CIO
1.11.)
1,600 bits (100 words): CIO 100.00 to CIO 199.15 (The 16 built-in outputs are allocated in CIO 100.00 to CIO 100.07 and CIO
101.00 to CIO 101.07.)
CIO 200 to CIO 203
CIO 210 to CIO 211
1,440 bits (90 words): CIO 3100.00 to CIO 3189.15 (CIO 3100 to CIO 3189)
8,192 bits (512 words): W0.00 to W511.15 (W0 to W511)
CIO Area: 37,504 bits (2,344 words): CIO 3800.00 to CIO 6143.15 (CIO 3800 to CIO 6143)
16 bits: TR0 to TR15
8,192 bits (512 words): H0.00 to H511.15 (H0 to H511)
Read-only (Write-prohibited): 7168 bits (448 words): A0.00 to A447.15 (A0 to A447)
Read/Write: 8192 bits (512 words): A448.00 to A959.15 (A448 to A959)
4,096 bits: T0 to T4095
4,096 bits: C0 to C4095
32 Kwords: D0 to D32767
16 registers (16 bits): DR0 to DR15
16 registers (32 bits): IR0 to IR15
32 flags (32 bits): TK0000 to TK0031
4,000 words (500 samples for the trace data maximum of 31 bits and 6 words.)
A special Memory Cassette (CP1W-ME05M) can be mounted.
Note: Can be used for program backups and auto-booting.
Supported. Accuracy (monthly deviation): −4.5 min to −0.5 min (ambient temperature: 55°C),
−2.0 min to +2.0 min (ambient temperature: 25°C), −2.5 min to +1.5 min (ambient temperature: 0°C)
One built-in peripheral port (USB 1.1): For connecting Support Software only.
A maximum of two Serial Communications Option Boards can be mounted.
A maximum of one Ethernet Option Board can be mounted.
Flash memory: User programs, parameters (such as the PLC Setup), comment data, and the entire DM Area can be saved to flash
memory as initial values.
Battery backup: The Holding Area, DM Area, and counter values (flags, PV) are backed up by a battery.
5 years at 25°C. (Use the replacement battery within two years of manufacture.)
40 (24 inputs, 16 outputs)
CP Expansion I/O Units: 7 max.; CJ-series Special I/O Units or CPU Bus Units: 2 max.
320 (40 built in + 40 per Expansion (I/O) Unit × 7 Units)
8 inputs (Shared by the external interrupt inputs (counter mode) and
the quick-response inputs.)
8 inputs (Response frequency: 5 kHz max. for all interrupt inputs),
16 bits
Up or down counters
8 points (Min. input pulse width: 50 μs max.)
1
CP1H-XA CPU Units
CP1H-XA@@@-@
CP1H-X CPU Units
CP1H-X@@@-@
CPU Unit Specifications
6 (interrupt task No. 140 to 145, fixed)
20 (12 inputs, 8 outputs)
Line-driver inputs: Two axes for phases A, B, and Z
Line-driver outputs: Two axes for CW and CCW
300 (20 built in + 40 per Expansion (I/O) Unit × 7 Units)
6 inputs (Shared by the external interrupt inputs (counter
mode) and the quick-response inputs.)
6 inputs (Response frequency: 5 kHz max. for all interrupt
inputs), 16 bits
Up or down counters
6 points (Min. input pulse width: 50 μs max.)
---
---
CP1H-Y CPU Units
CP1H-Y@@@-@
31