PIC16C56A-04/P Microchip Technology Inc., PIC16C56A-04/P Datasheet - Page 33

• Manufacturer Part Number: PIC16C56A-04/P
• Description: 18 PIN, 1.5 KB OTP, 25 RAM, 12 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16C56A-04/P

• Cpu Speed: 10 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 12
• Memory Capacity: 1024 Bytes
• Memory Type: OTP
• Number Of Bits: 8
• Number Of Leads: 12
• Package Type: 18-pin PDIP
• Programmable Memory: 1.5K Bytes
• Ram Size: 25 Bytes
• Speed: 4 MHz
• Timers: 1- 8-bit
• Voltage, Range: 2.5-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

6.5
As a program instruction is executed, the Program
Counter (PC) will contain the address of the next pro-
gram instruction to be executed. The PC value is
increased by one, every instruction cycle, unless an
instruction changes the PC.
For a GOTO instruction, bits 8:0 of the PC are provided
by the GOTO instruction word. The PC Latch (PCL) is
mapped to PC<7:0> (Figure 6-7, Figure 6-8 and
Figure 6-9).
For
PIC16CR57, PIC16C58 and PIC16CR58, a page num-
ber must be supplied as well. Bit5 and bit6 of the STA-
TUS Register provide page information to bit9 and
bit10 of the PC (Figure 6-8 and Figure 6-9).
For a CALL instruction, or any instruction where the
PCL is the destination, bits 7:0 of the PC again are pro-
vided by the instruction word. However, PC<8> does
not come from the instruction word, but is always
cleared (Figure 6-7 and Figure 6-8).
Instructions where the PCL is the destination, or modify
PCL instructions, include MOVWF PCL, ADDWF PCL,
and BSF PCL,5.
For
PIC16CR57, PIC16C58 and PIC16CR58, a page num-
ber again must be supplied. Bit5 and bit6 of the STA-
TUS Register provide page information to bit9 and
bit10 of the PC (Figure 6-8 and Figure 6-9).
FIGURE 6-7:
GOTO Instruction
CALL or Modify PCL Instruction
Note:
2002 Microchip Technology Inc.
the
the
Reset to ’0’
Program Counter
PC
PC
Because PC<8> is cleared in the CALL
instruction, or any modify PCL instruction,
all subroutine calls or computed jumps are
limited to the first 256 locations of any pro-
gram memory page (512 words long).
PIC16C56,
PIC16C56,
8
8
7
7
Instruction Word
Instruction Word
LOADING OF PC
BRANCH INSTRUCTIONS
- PIC16C54, PIC16CR54,
PIC16C55
PCL
PCL
PIC16CR56,
PIC16CR56,
0
0
PIC16C57,
PIC16C57,
Preliminary
FIGURE 6-8:
FIGURE 6-9:
CALL or Modify PCL Instruction
CALL or Modify PCL Instruction
GOTO Instruction
GOTO Instruction
PC
PC
PC
PC
7
7
7
7
10
10
2
10
2
10
2
2
0
0
0
0
9
9
STATUS
9
STATUS
9
PA<1:0>
STATUS
PA<1:0>
STATUS
PA<1:0>
PA<1:0>
Reset to ‘0’
Reset to ‘0’
8 7
8 7
8 7
8 7
LOADING OF PC
BRANCH INSTRUCTIONS
- PIC16C56/PIC16CR56
LOADING OF PC
BRANCH INSTRUCTIONS
- PIC16C57/PIC16CR57,
AND PIC16C58/
PIC16CR58
Instruction Word
Instruction Word
Instruction Word
Instruction Word
PIC16C5X
PCL
0
PCL
PCL
0
PCL
0
0
DS30453D-page 31
0
0
0
0