PIC32MX460F256LT-80V/BG Microchip Technology, PIC32MX460F256LT-80V/BG Datasheet - Page 105

• Manufacturer Part Number: PIC32MX460F256LT-80V/BG
• Description: 256 KB Flash, 32 KB RAM, USB-OTG, 80 MHz, 10-Bit ADC, DMA 121 XBGA 10x10x1.20mm
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX460F256LT-80V/BG

• Processor Series: PIC32MX4xx
• Core: MIPS
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 32 KB
• Interface Type: USB, I2C, UART, RS-232, RS-485, SPI
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 5
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: XBGA-121
• Operating Temperature Range: - 40 C to + 105 C
• Supply Current (max): 10 mA
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: -
• Eeprom Size: -
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Lead Free Status / Rohs Status: Details

14.0
This family of PIC32MX devices features four
synchronous 16-bit timers (default) that can operate as
a free-running interval timer for various timing applica-
tions and counting external events. The following
modes are supported:
• Synchronous Internal 16-bit Timer
• Synchronous Internal 16-bit Gated Timer
• Synchronous External 16-bit Timer
FIGURE 14-1:
© 2011 Microchip Technology Inc.
Note 1: ADC event trigger is available on Timer3 only.
Note 1: This data sheet summarizes the features
2: TxCK pins not available on 64-pin devices.
TxCK
Trigger
ADC Event
2: Some registers and associated bits
TxIF
Event Flag
TIMER2/3 AND TIMER4/5
of the PIC32MX3XX/4XX family of
devices. It is not intended to be a compre-
hensive reference source. To comple-
ment the information in this data sheet,
refer to Section 14. “Timers” (DS61105)
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
of the “PIC32 Family Reference Manual”,
which is available from the Microchip web
site (www.microchip.com/PIC32).
(2)
(1)
TGATE (TxCON<7>)
TIMER2, 3, 4, 5 BLOCK DIAGRAM (16-BIT)
0
1
Reset
Equal
Comparator x 16
TMRx
PRx
Q
Q
PBCLK
in
Gate
Sync
D
Two 32-bit synchronous timers are available by
combining Timer2 with Timer3 and Timer4 with Timer5.
The 32-bit timers can operate in three modes:
• Synchronous Internal 32-bit Timer
• Synchronous Internal 32-bit Gated Timer
• Synchronous External 32-bit Timer
14.1
• Selectable clock prescaler
• Timers operational during CPU Idle
• Time base for input capture and output compare
• ADC event trigger (Timer3 only)
• Fast bit manipulation using CLR, SET and INV
Note:
modules (Timer2 and Timer3 only)
registers
PIC32MX3XX/4XX
Additional Supported Features
1 0
0 0
x 1
Throughout this chapter, references to
registers TxCON, TMRx and PRx use ‘x’
to represent Timer2 through 5 in 16-bit
modes. In 32-bit modes, ‘x’ represents
Timer2 or 4; ‘y’ represents Timer3 or 5.
TCKPS (TxCON<6:4>)
TGATE (TxCON<7>)
TCS (TxCON<1>)
ON (TxCON<15>)
1, 2, 4, 8, 16,
32, 64, 256
Prescaler
Sync
DS61143H-page 105
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