PIC32MX675F512L-80V/PF Microchip Technology, PIC32MX675F512L-80V/PF Datasheet - Page 63
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PIC32MX675F512L-80V/PF
Manufacturer Part Number
PIC32MX675F512L-80V/PF
Description
512 KB Flash, 64 KB RAM, USB-OTG, Ethernet, 80 MHz, 10-Bit ADC, DMA 100 TQFP 14x
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet
1.PIC32MX575F256H-80VPT.pdf
(256 pages)
Specifications of PIC32MX675F512L-80V/PF
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
100-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX675F512L-80V/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
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TABLE 4-2:
Legend:
Note
1000
1010 INTSTAT
1020
1030
1040
1050
1060
1070
1080
1090
10A0
INTCON
1:
2:
3:
IPTMR
IFS0
IFS1
IFS2
IEC0
IEC1
IEC2
IPC0
IPC1
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Except where noted, all registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4 0x8 and 0xC, respectively. See
and INV Registers”
These bits are not available on PIC32MX534/564/664/764 devices.
This register does not have associated CLR, SET, and INV registers.
(3)
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
INTERRUPT REGISTER MAP FOR PIC32MX534F064H, PIC32MX564F064H, PIC32MX564F128H, PIC32MX575F256H AND
PIC32MX575F512H DEVICES
I2C1MIF I2C1SIF
I2C1MIE I2C1SIE
RTCCIF
RTCCIE FSCMIE
IC3EIF
INT3IE
IC3EIE
INT3IF
31/15
—
—
—
—
—
—
—
—
—
—
—
—
for more information.
FSCMIF
IC2EIF
IC2EIE
OC3IF
OC3IE
30/14
FRZ
—
—
—
—
—
—
—
—
—
—
—
I2C1BIF
I2C1BIE
IC1EIF
IC1EIE
29/13
IC3IF
IC3IE
—
—
—
—
—
—
—
—
—
—
—
—
—
—
SPI3TXIF
SPI3TXIE
I2C3MIF
I2C3MIE
U1TXIF
U1TXIE
MVEC
28/12
T3IE
T3IF
—
—
—
—
—
—
—
—
—
—
—
(1)
INT1IP<2:0>
INT0IP<2:0>
CS0IP<2:0>
IC1IP<2:0>
SPI3RXIF
SPI3RXIE
U1RXIF
I2C3SIF
U1RXIE
I2C3SIE
U5TXIE
U5TXIF
INT2IE
INT2IF
27/11
—
—
—
—
—
—
—
—
—
—
SPI4TXIE
SPI4TXIF
I2C5MIE
SPI3EIF
I2C3BIF
I2C5MIF
SPI3EIE
I2C3BIE
CAN1IF
U2TXIF
U5RXIF
CAN1IE
U2TXIE
U5RXIE
OC2IE
U1EIF
OC2IF
U1EIE
26/10
—
—
—
—
SRIPL<2:0>
TPC<2:0>
SPI4RXIF
SPI4RXIE
I2C5SIE
U2RXIF
I2C5SIF
U2RXIE
USBIE
USBIF
U5EIF
U5EIE
IC2IF
IC2IE
25/9
—
—
—
—
—
—
INT0IS<1:0>
INT1IS<1:0>
CS0IS<1:0>
IC1IS<1:0>
IPTMR<31:0>
SPI4EIF
I2C5BIF
SPI4EIE
I2C5BIE
U6TXIF
U6TXIE
FCEIE
FCEIF
U2EIF
U2EIE
T2IF
T2IE
24/8
—
—
—
—
—
—
Bits
DMA7IF
DMA7IE
SPI2TXIF SPI2RXIF
SPI2TXIE SPI2RXIE
I2C4MIF
I2C4MIE
U3TXIF
U6RXIF
U3TXIE
U6RXIE
INT1IF
INT1IE
23/7
—
—
—
—
—
—
—
—
—
—
—
—
(2)
(2)
DMA6IF
DMA6IE
I2C4SIF
I2C4SIE
U3RXIF
U3RXIE
OC5IF
OC1IF
OC5IE
OC1IE
U6EIF
U6EIE
22/6
—
—
—
—
—
—
—
—
—
—
(2)
(2)
DMA5IF
DMA5IE
SPI2EIF
SPI2EIE
I2C4BIE
I2C4BIF
U4TXIF
U4TXIE
U3EIF
U3EIE
IC5IF
IC1IF
IC5IE
IC1IE
21/5
—
—
—
—
—
—
—
—
—
(2)
(2)
DMA4IF
DMA4IE
CMP2IF
CMP2IE
INT4EP
U4RXIF
U4RXIE
T5IF
T1IF
T5IE
T1IE
20/4
—
—
—
—
(2)
(2)
OC1IP<2:0>
CS1IP<2:0>
CTIP<2:0>
T1IP<2:0>
DMA3IF DMA2IF DMA1IF DMA0IF
CMP1IF
DMA3IE DMA2IE DMA1IE DMA0IE
CMP1IE PMPIE
INT3EP INT2EP INT1EP INT0EP
INT4IF
INT0IF
INT4IE
INT0IE
VEC<5:0>
U4EIF
U4EIE
19/3
—
—
—
—
PMPEIF IC5EIF
PMPEIE IC5EIE IC4EIE
PMPIF
OC4IE
OC4IF
CS1IF
CS1IE
18/2
—
—
—
—
Section 12.1.1 “CLR, SET
CS0IF
AD1IF
CS0IE
AD1IE
IC4IE
IC4IF
17/1
OC1IS<1:0>
CS1IS<1:0>
—
—
—
—
CTIS<1:0>
T1IS<1:0>
IC4EIF
CTIF
CNIF
CTIE
CNIE
16/0
T4IF
T4IE
SS0
—
—
—
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
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