PIC32MX795F512HT-80V/MR Microchip Technology, PIC32MX795F512HT-80V/MR Datasheet - Page 109

• Manufacturer Part Number: PIC32MX795F512HT-80V/MR
• Description: 512 KB Flash, 128 KB RAM, USB-OTG, Dual CAN, Ethernet, 80 MHz, 10-Bit ADC, DMA 6
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX795F512HT-80V/MR

• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: CAN, Ethernet, I²C, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-VFQFN Exposed Pad
• Core: MIPS
• Processor Series: PIC32MX7xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 80 MHz
• Data Ram Size: 64 KB
• Number Of Programmable I/os: 5
• Number Of Timers: 5
• Operating Supply Voltage: 2.3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Interface Type: USB, I2C, UART, RS-232, RS-485, SPI
• Maximum Operating Temperature: + 85 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 4-44:
Legend:
Note
53B0
53C0
53D0
53E0
53F0
1:
2:
3:
4:
U1EP11
U1EP12
U1EP13
U1EP14
U1EP15
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table (except as noted) have corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC respectively. See
more information.
This register does not have associated SET and INV registers.
This register does not have associated CLR, SET and INV registers.
Reset value for this bit is undefined.
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
USB REGISTER MAP
31/15
—
—
—
—
—
—
—
—
—
—
30/14
—
—
—
—
—
—
—
—
—
—
29/13
—
—
—
—
—
—
—
—
—
—
(1)
(CONTINUED)
28/12
—
—
—
—
—
—
—
—
—
—
27/11
—
—
—
—
—
—
—
—
—
—
26/10
—
—
—
—
—
—
—
—
—
—
25/9
—
—
—
—
—
—
—
—
—
—
24/8
—
—
—
—
—
—
—
—
—
—
23/7
Bits
—
—
—
—
—
—
—
—
—
—
22/6
—
—
—
—
—
—
—
—
—
—
21/5
—
—
—
—
—
—
—
—
—
—
EPCONDIS
EPCONDIS
EPCONDIS
EPCONDIS
EPCONDIS
20/4
—
—
—
—
—
EPRXEN
EPRXEN
EPRXEN
EPRXEN
EPRXEN
19/3
—
—
—
—
—
Section 12.1.1 “CLR, SET and INV Registers”
EPTXEN
EPTXEN
EPTXEN
EPTXEN
EPTXEN
18/2
—
—
—
—
—
EPSTALL
EPSTALL
EPSTALL
EPSTALL
EPSTALL
17/1
—
—
—
—
—
EPHSHK
EPHSHK
EPHSHK
EPHSHK
EPHSHK
16/0
—
—
—
—
—
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
for