MAX9125ESE+ Maxim Integrated Products, MAX9125ESE+ Datasheet - Page 9

• Manufacturer Part Number: MAX9125ESE+
• Description: IC QUAD LVDS LINE RCVR 16-SOIC
• Manufacturer: Maxim Integrated Products
• Type: Receiverr

Specifications of MAX9125ESE+

• Number Of Drivers/receivers: 0/4
• Protocol: RS644
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

that have matched differential impedance to minimize
impedance discontinuities.
Avoid the use of unbalanced cables such as ribbon or
simple coaxial cable. Balanced cables such as twisted
pair offer superior signal quality and tend to generate
less EMI due to canceling effects. Balanced cables
pick up noise as common mode, which is rejected by
the LVDS receiver.
The MAX9126 has an integrated termination resistor
connected across the inputs of each receiver. The
value of the integrated resistor is specified in the DC
characteristics.
The MAX9125 requires an external termination resistor.
The termination resistor should match the differential
impedance of the transmission line. Termination resis-
tance values range between 90Ω and 132Ω, depend-
ing on the characteristic impedance of the transmission
medium.
When using the MAX9125, minimize the distance
between the input termination resistors and the MAX9125
receiver inputs. Use 1% surface-mount resistors.
_______________________________________________________________________________________
Quad LVDS Line Receivers with
Termination
Integrated Termination
Keep the LVDS and any other digital signals separated
from each other to reduce crosstalk.
For LVDS applications, use a four-layer PC board that
provides separate power, ground, LVDS signals, and
output signals. Isolate the input LVDS signals from the
output LVCMOS/LVTTL signals to prevent coupling.
Separate the input LVDS signal plane from the LVC-
MOS/LVTTL output signal plane with the power and
ground planes for best results.
TRANSISTOR COUNT: 940
PROCESS: CMOS
Chip Information
Board Layout
9