ATA6602-EK Atmel, ATA6602-EK Datasheet - Page 214

• Manufacturer Part Number: ATA6602-EK
• Manufacturer: Atmel

Specifications of ATA6602-EK

• Lead Free Status / Rohs Status: Supplier Unconfirmed

214
ATA6602/ATA6603
Table 4-76.
Table 4-77.
Table 4-78.
• Bit 2:1 – UCSZn1:0: Character Size
• Bit 0 – UCPOLn: Clock Polarity
UCPOLn
The UCSZn1:0 bits combined with the UCSZn2 bit in UCSRnB sets the number of data bits
(Character SiZe) in a frame the Receiver and Transmitter use.
This bit is used for synchronous mode only. Write this bit to zero when asynchronous mode
is used. The UCPOLn bit sets the relationship between data output change and data input
sample, and the synchronous clock (XCKn).
UCSZn2
0
1
0
0
0
0
1
1
1
1
Transmitted Data Changed (Output of
TxDn Pin)
Rising XCKn Edge
Falling XCKn Edge
USBS Bit Settings
UCSZn Bits Settings
UCPOLn Bit Settings
USBSn
0
1
UCSZn1
0
0
1
1
0
0
1
1
Stop Bit(s)
1-bit
2-bit
UCSZn0
0
1
0
1
0
1
0
1
Received Data Sampled (Input on RxDn
Pin)
Falling XCKn Edge
Rising XCKn Edge
Character Size
5-bit
6-bit
7-bit
8-bit
Reserved
Reserved
Reserved
9-bit
4921E–AUTO–09/09