DS26514GN+ Maxim Integrated Products, DS26514GN+ Datasheet - Page 21

IC TXRX T1/E1/J1 4PORT 256-CSBGA

DS26514GN+

Manufacturer Part Number
DS26514GN+
Description
IC TXRX T1/E1/J1 4PORT 256-CSBGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet

Specifications of DS26514GN+

Number Of Drivers/receivers
4/4
Protocol
Ethernet
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
256-CSBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AL/RSIGF/FLOS2
AL/RSIGF/FLOS3
AL/RSIGF/FLOS4
Rev: 101608
TSSYNCIO1
TSSYNCIO2
TSSYNCIO3
TSSYNCIO4
TSYSCLK2/
TSYSCLK3/
TSYSCLK4/
TSYSCLK1
TSYNC1/
TSYNC2/
TSYNC3/
TSYNC4/
TSER1
TSER2
TSER3
TSER4
TCLK1
TCLK2
TCLK3
TCLK4
NAME
P13
PIN
M6
M7
E7
R4
N7
C5
D7
P5
P3
B4
F6
L8
F3
L3
F7
Input with
pulldown/
internal
Output
Output
TYPE
Input/
Input
Input
Input
Transmit NRZ Serial Data 1 to 4. These pins are sampled on the falling edge of
TCLKn when the transmit-side elastic store is disabled. These pins are sampled
on the falling edge of TSYSCLKn when the transmit-side elastic store is enabled.
In IBO mode, data for multiple framers can be used in high-speed multiplexed
scheme. This is described in Section 9.8.2. The table there presents the
combination of framer data for each of the streams.
TSYSCLKn is used as a reference when IBO is invoked. See
Transmit Clock 1 to 4. A 1.544MHz or a 2.048MHz primary clock. Used to clock
data through the transmit side of the transceiver. TSERn data is sampled on the
falling edge of TCLKn. TCLKn is used to sample TSERn when the elastic store is
not enabled or IBO is not used.
used as the internal transmit clock for the framer side or the elastic store
including the transmit framer and LIU. With the elastic store enabled,
TCLKn can be either synchronous or asynchronous to TSYSCLKn which
either prevents or allows for slips. When IBO mode is enabled, TCLKn
must be synchronous to TSYSCLKn which prevents slips in the elastic
store.
Note: This clock must be provided for proper device operation. The only
exception is when the TCR3 register is configured to source TCLK
internally from RCLK.
Transmit System Clock 1. 1.544MHz, 2.048MHz, 4.096MHz, 8.192MHz, or
16.384MHz clock. Only used when the transmit-side elastic store function is
enabled. Should be tied low in applications that do not use the transmit-side
elastic store. The clock can be 4.096MHz, 8.912MHz, or 16.384MHz when IBO
mode is used. TSYSCLK1 does not have an internal pulldown resistor. Note: If
the GTCR1.528MD bit is set, TSYSCLK1 becomes the master TSYSCLK for all
framers.
Transmit System Clock 2 to 4. 1.544MHz, 2.048MHz, 4.096MHz, 8.192MHz, or
16.384MHz clock. Only used when the transmit-side elastic store function is
enabled. Should be tied low in applications that do not use the transmit-side
elastic store. The clock can be 4.096MHz, 8.912MHz, or 16.384MHz when IBO
mode is used. TSYSCLK1 does not have an internal pulldown resistor. Note: If
the GTCR1.528MD bit is set, TSYSCLK1 becomes the master TSYSCLK for all
framers.
Analog Loss/Receive-Signaling Freeze/Framer LOS. Analog LOS reflects the
LOS (loss of signal) detected by the LIU front-end and framer LOS is LOS
detection by the corresponding framer; the same pins can reflect receive-
signaling freeze indications. This selection can be made by settings in the Global
Transceiver Clock Control Register 1 (GTCCR1).
AL/RSIGF/FLOS[8:2] is available only by setting the GTCR1.528MD bit to 1.
Transmit Synchronization 1 to 4. A pulse at these pins establishes either frame
or multiframe boundaries for the transmit side. These signals can also be
programmed to output either a frame or multiframe pulse. If these pins are set to
output pulses at frame boundaries, they can also be set to output double-wide
pulses at signaling frames in T1 mode. The operation of these signals is
synchronous with TCLK[8:1].
Transmit System Synchronization In. These pins are selected when the
transmit-side elastic store is enabled. A pulse at these pins establishes either
frame or multiframe boundaries for the transmit side. Should be tied low in
applications that do not use the transmit-side elastic store. The operation of this
signal is synchronous with TSYSCLK[8:1].
Transmit System Synchronization Out. If configured as an output and the
transmit elastic store is enabled, an 8kHz pulse synchronous to the BPCLK1 will
be generated. This pulse in combination with BPCLK1 can be used as an IBO
master. TSSYNCIOn can be used as a source to RSYNCn and TSSYNCIOn of
another DS26514 or RSYNC and TSSYNC of other Dallas Semiconductor parts.
Note: TSSYNCIO[8:1] are not used when GTCR1.528MD is set. When
GTCR1.528MD is set, the TSSYNCIO pin (N13) is used.
TRANSMIT FRAMER
When the elastic store is enabled, TCLKn is
FUNCTION
DS26514 4-Port T1/E1/J1 Transceiver
Table 9-8
21 of 305
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