MC68160AFB Freescale Semiconductor, MC68160AFB Datasheet
MC68160AFB
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MC68160AFB Summary of contents
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... The sale and use of this product is licensed under technology covered by one or more Digital Equipment Corporation patents. Order this document by MC68160A/D MC68160A ENHANCED ETHERNET INTERFACE TRANSCEIVER SEMICONDUCTOR TECHNICAL DATA SUFFIX PLASTIC PACKAGE CASE 848D (LQFP–52) ORDERING INFORMATION Operating Temperature Range Device Package MC68160AFB LQFP Motorola, Inc. 2000 Rev 1 ...
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Figure 1. 10Base–T Interface Block Diagram RX Manchester RCLK Decoder MFILT Pulse Conditioner RXLED Carrier RENA Detect CLLED Pulse Conditioner CLSN Mux Pulse TXLED Conditioner TENA Manchester TX Encoder Mux X1 20 MHz X2 Osc TCLK 2 CS0 Jabber CS1 ...
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Enhanced Ethernet Serial Transceiver Table 1. Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Pin(s) Symbol Type CONTROLLER INTERFACE 1 RENA O TTL/CMO TTL/CMOS 48 TCLK O TTL/CMOS 49 TENA I TTL 50 RCLK O TTL/CMOS 51 CLSN O TTL/CMOS TTL AUI INTERFACE 21 ACX– ACX+ ...
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Table 1. Pin Function Description (continued) Pin(s) Symbol Type OSCILLATOR AND FREQUENCY MULTIPLIER 12 MFILT I/C CMOS 17 X2 O/C CMOS MODE SELECT 3 CS0 I 4 CS1 TTL 5 CS2 6 LOOP I TTL 9 APORT ...
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Table 1. Pin Function Description (continued) Pin(s) Symbol Type STATUS INDICATOR 40 TXLED O TTL/CMOS 41 RXLED O TTL/CMOS 42 CLLED O TTL/CMOS 43 TPLIL O TTL/CMOS 44 TPPLR O TTL/CMOS 45 TPJABB O TTL/CMOS POWER SUPPLY AND GROUND 10 ...
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Motorola Motorola Controller 2 Transceiver MC68160A MC68360 (EEST ) (QUICC ) CS0 1 CS1 1 CS2 0 Pin Pin Sense TCLK TCLK High TX TX High TENA TENA High RCLK RCLK High RX RX High RENA RENA High CLSN CLSN ...
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MAXIMUM RATINGS Characteristic Storage Temperature Range Power Supply Voltage Range Analog Digital Voltage on any TTL compatible input pin with respect to Ground Voltage on TPRX, ARX, or ACX input pins with respect to Ground Differential Voltage on TPRX, ARX, ...
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DC ELECTRICAL CHARACTERISTICS limits apply over the recommended ambient operating temperature and power supply voltage ranges for each MC68160A except where noted.) Characteristic TTL COMPATIBLE INPUTS TTL Compatible Input Voltage Low State High State Input Current TTL Compatible Input Pins ...
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DC ELECTRICAL CHARACTERISTICS limits apply over the recommended ambient operating temperature and power supply voltage ranges for each MC68160A except where noted.) Characteristic TWISTED PAIR TRANSMITTER OUTPUTS Differential Output Voltage IDLE Mode Open Circuit Differential Output Impedance TRANSMISSION Mode IDLE ...
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Figure 3. Test Load B1 39 Device V1 RCM 1 Device NOTE: A total of 50 per driver output is required for proper series line termination. This is realized with the 39 external resistors shown in Figures 3, ...
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AC ELECTRICAL CHARACTERISTICS temperature and power supply voltage ranges.) Characteristic EXTERNAL CLOCK INPUT (X1) Cycle Time (Note 1) (See Figure 8) Fall Time Rise Time Low Time High Time RECEIVE PHASE–LOCKED–LOOP SWITCHING Stabilization Time CONTROLLER TRANSMIT SWITCHING (MOTOROLA MODE) TCLK ...
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Figure 9. Receive Phase–Locked–Loop Switching D D CS0 CS1 CS2 1.5V TPRX RENA NOTE: CS0 CS1 CS2 is the logical AND operation and refers to the pins not at Logic 1. Figure 10. Transmit Timing (Motorola Mode 1.5V ...
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Figure 12. Receive Timing (Motorola End of Frame) RENA RCLK RX CONTROLLER TRANSMIT SWITCHING (Intel Mode – Support by MC68160A Only) Characteristic TXC Cycle Time TXC High and Low Time TXC Rise and Fall Time TXD Setup Time to TXC ...
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CRS RXC RXD CONTROLLER TRANSMIT SWITCHING (Fujitsu Mode – Supported by MC68160A Only) Characteristic TCKN Cycle Time TCKN High and Low Time TCKN Rise and Fall Time TXD Setup Time to TCKN TXD Hold Time to TCKN TEN Setup Time ...
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Figure 16. Receive Timing (Fujitsu Start of Frame) 1.5V XCD t 105 RCKN RXD Figure 17. Receive Timing (Fujitsu End of Frame) XCD RCKN RXD CONTROLLER TRANSMIT SWITCHING (National Mode – Supported by MC68160A Only) Characteristic TXC Cycle Time TXC ...
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TXC t 115 1.5V TXE TXD 1.5V CRS t 125 1.5V RXC RXD MOTOROLA ANALOG IC DEVICE DATA MC68160A Figure 18. Transmit Timing (National) t 110 3V 1.5V 1.5V 0.8V 0.8V t 111 t 112 t 112 ...
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TP TRANSMIT SWITCHING Characteristic TPTX Common Mode AC Output Voltage (Note TPTX Steady State Propagation Delay (Note 2) (See Figure 24) Bit Duration Center–to–Center Half–Bit Cell Duration Center–to–Boundary TENA Assert to RENA Assert Delay (Note 7) (See ...
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Figure 24. TPTX Transmit Timing (Start of Frame) Switching X1 TCLK 1.5V TENA 1 TX 1.5V RENA RX TPTX +/– Differential (Logic Levels) TPTX +/– Differential (Pre–Emphasis) Figure 25. TPTX Transmit Timing (End of Frame) Switching t 136 90% TPTX ...
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TP TRANSMIT JABBER SWITCHING Characteristic Max Length of Transmission before Assertion of TPJABB to indicate Jabber Condition CLSN to indicate Jabber Condition Time from End of Jabber Condition to Deassertion: of TPJABB of CLSN TP ...
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Figure 29. TPTX SQE (CLSN) Timing (End of Frame) TPTX+/– TPSQEL CLSN TP RECEIVE SWITCHING Characteristic Differential Input Voltage Range Unconditional Squelch (Note 1) (1.8 V < Input Common Mode Voltage < 3.2 V) Positive or Negative Differential Input Pulse ...
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Figure 32. TPRX Receive Timing (Start of Frame –300mV TPRX+/– RENA RCLK RX Figure 33. RENA Deassertion Delay from Last Valid Positive Transition of TPRX Pair TPRX+/– RENA Figure 34. TP Receive Link Integrity Switching t 201 TPRX ...
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TP COLLISION SWITCHING Characteristic Time from collision (TPRX activity caused assertion of RENA followed by assertion of TENA) to assertion of CLSN Time from end of collision (Deassertion of TENA with uninterrupted TPRX pair activity) to deassertion of CLSN TP ...
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AUI TRANSMIT SWITCHING Characteristic TCLK to ATX Pair Steady State Propagation Delay Output Differential Rise and Fall Times (Measured directly at device pins) ATX Bit Cell Duration center–to–center (Measured directly at device pins) ATX Half–Bit Cell Duration center–to–boundary (Measured directly ...
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Bit Q Bit U Bit V ARX+/–/ ACX+/– t 261 Differential Input Voltage –40mV 1 0 –275mV –300mV t 266 1.5V RENA/CLSN RCLK RX Bit Q Introduction The MC68160A was designed to perform the physical connection to the Ethernet media. ...
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If after approximately 40 ms after AUI transmission has begun, the EEST is still transmitting, the TPJABB pin will assert to signify a jabber condition. Also, the CLLED pin will transition high and low alternately with a ...
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Selection of Crystal and External Components Accuracy of frequency and stability over temperature are the main determinants of crystal choice. Specifications for a suitable crystal are tabulated below. Frequency Mode Tolerance Stability Aging Shunt Capacitance Load Capacitance Series Fundamental Resistance ...
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Figure 41. Î Î Î Î Î Î PE-65424) Î Î Î Î Î Î Î Î Î Î Î Î TXLED RXLED CLLED TPLIL TPPLR TPJABB TPEN GNDCTL TCLK TENA RCLK CLSN TX 28 MC68160A of (Example ATX+ ATX– ...
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H L– VIEW Y 3X –L– –N– –H– –T– 3 SEATING 4X PLANE 0.05 (0.002 VIEW AA MOTOROLA ANALOG IC DEVICE DATA ...
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MC68160A NOTES MOTOROLA ANALOG IC DEVICE DATA ...
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MOTOROLA ANALOG IC DEVICE DATA MC68160A NOTES 31 ...
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Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of ...