DS2186S/T&R Maxim Integrated Products, DS2186S/T&R Datasheet

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DS2186S/T&R

Manufacturer Part Number
DS2186S/T&R
Description
IC TRANSMIT LINE INTERFC 20-SOIC
Manufacturer
Maxim Integrated Products
Type
Line Driver, Transmitterr
Datasheet

Specifications of DS2186S/T&R

Number Of Drivers/receivers
1/0
Protocol
T1/CEPT
Voltage - Supply
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
FEATURES
DESCRIPTION
The DS2186 T1/CEPT Transmit Line Interface Chip in-
terfaces user equipment to North American (T1–1.544
MHz) and European (CEPT–2.048 MHz) primary rate
communications networks. The device is compatible
with all types of twisted pair and coax cable found in
such networks.
Key on–chip components include: programmable wave
shaping circuitry, line drivers, remote loopback, and
zero suppression logic. A line–coupling transformer is
the only external component required.
Line interface for T1 (1.544 MHz) and CEPT (2.048
MHz) primary rate networks
On–chip transmit LBO (line build out) and line drivers
eliminate external components
Programmable output pulse shape supports short–
and long–loop applications
Supports bipolar and unipolar input data formats
Transparent B8ZS and HDB3 zero code suppression
modes
Compatible with DS2180A T1 and DS2181A CEPT
Transceivers DS2141A T1 and DS2143 E1 Control-
lers
Companion to the DS2187 Receive Line Interface
and DS2188 T1/CEPT Jitter Attenuator
Single 5V supply; low–power CMOS technology
PIN ASSIGNMENT
Short loop (DSX–1, 0 to 655 feet) and long loop (CSU; 0
dB, –7.5 dB and –15 dB) pulse templates found in T1
applications are supported. Appropriate CCITT recom-
mendations are met in the CEPT mode.
Application areas include DACS, CSU, CPE, channel
banks, and PABX–to–computer interfaces such as DMI
and CPI. The DS2186 supports ISDN–PRI (Primary
Rate Interface) specifications.
TCLKSEL
TCLKSEL
Transmit Line Interface
ZCSEN
TRING
ZCSEN
TRING
LEN0
LEN1
LEN2
LEN0
LEN1
LEN2
TAIS
VDD
TTIP
VSS
TAIS
V
TTIP
V
DD
SS
20–PIN SOIC (300 Mil)
20–PIN DIP (300 MIL)
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
20
19
18
17
16
15
14
13
12
11
LCLK
LPOS
LNEG
TCLK
TPOS
TNEG
LB
MTIP
MRING
LF
LCLK
LPOS
LNEG
TCLK
TPOS
TNEG
LB
MTIP
MRING
LF
DS2186
022798 1/11
DS2186

Related parts for DS2186S/T&R

DS2186S/T&R Summary of contents

Page 1

FEATURES Line interface for T1 (1.544 MHz) and CEPT (2.048 MHz) primary rate networks On–chip transmit LBO (line build out) and line drivers eliminate external components Programmable output pulse shape supports short– and long–loop applications Supports bipolar and unipolar input ...

Page 2

DS2186 DS2186 BLOCK DIAGRAM Figure 1 VSS LNEG LPOS LCLK INPUT ZERO CODE DATA SUPPRESSION TNEG MUX CIRCUITRY TPOS TCLK LB ZCSEN TAIS TCLKSEL SYSTEM LEVEL INTERCONNECT Figure 2 DS2187 AVDD LCAP ZCSEN RCLKSEL RTIP RRING RECEIVE ...

Page 3

PIN DESCRIPTION Table 1 PIN SYMBOL TYPE 1 TAIS I Transmit Alarm Indication Signal. When high, output data is forced to all ones at the TCLK (LB=0) or LCLK (LB=1) rate. 2 ZCSEN I Zero Code Suppression Enable. When high, ...

Page 4

DS2186 The shape of the “pre–emphasized” T1 waveform is controlled by inputs LEN0, LEN1, and LEN2 (TCLKSEL=0). These control inputs allow the user to select the appropriate output pulse shape to meet DSX–1 or CSU templates over a wide variety ...

Page 5

DSX–1 ISOLATED PULSE TEMPLATE Figure 3 1.0 0.5 NORMALIZED ALITITUDE 0.0 –0.5 0 250 NOTES: 1. Template shown is measured at the cross–connect point. 2. Amplitude shown is normalized; the actual midpoint voltage measured may be between 2.4 and 3.6 ...

Page 6

DS2186 OUTPUT PULSE TEMPLATE AT 2.048 MHz Figure 4 1.2 1.0 NORMALIZED AMPLITUDE 0.5 0.0 –0.2 NOTES: 1. Unlike the DSX–1 template, which is specified at the cross–connect point, the CEPT (2.048 MHz) template is spe- cified at the transmit ...

Page 7

CHARACTERISTICS OF T1 AND CEPT INTERFACES Table 3 CHARACTERISTIC LINE RATE 1.544 MHz 1 LINE CODE AMI or B8ZS TEST LOAD IMPEDANCE 100 ohm Resistive 2 NOMINAL PEAK 2.4V to 3.6 V VOLTAGE PULSE SHAPE NOMINAL PULSE WIDTH 324 ns ...

Page 8

DS2186 ABSOLUTE MAXIMUM RATINGS* Voltage on any Pin Relative to Ground Operating Temperature Storage Temperature Soldering Temperature * This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in ...

Page 9

AC ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL TCLK, LCLK Period t CLK TCLK, LCLK Period t CLK TCLK, LCLK Pulse Width t , RWH t RWL TCLK, LCLK Pulse Width t , RWH t RWL TCLK, LCLK Rise and Fall Times t ...

Page 10

DS2186 DS2186 TRANSMIT LINE INTERFACE 20–PIN DIP 022798 10/11 PKG 20–PIN DIM MIN A IN. 1.020 B MM 25.91 B IN. 0.240 MM 6.10 C IN. 0.120 MM 3.05 D IN. 0.300 MM ...

Page 11

DS2186S TRANSMIT LINE INTERFACE 20–PIN SOIC phi L J PKG 20–PIN DIM MIN A IN. 0.500 MM 12.70 B IN. 0.290 7.37 C IN. 0.089 MM 2.26 E IN. 0.004 MM ...

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