MAXQ1004-B01+ Maxim Integrated Products, MAXQ1004-B01+ Datasheet - Page 10

• Manufacturer Part Number: MAXQ1004-B01+
• Description: Microcontrollers (MCU) 1-Wire and SPI Authentication MCU
• Manufacturer: Maxim Integrated Products

Specifications of MAXQ1004-B01+

• Processor Series: MAXQ1004
• Core: RISC
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 16 KB
• Data Ram Size: 640 B
• Interface Type: 1-Wire, SPI, JTAG, TAP
• Maximum Clock Frequency: 6 MHz
• Number Of Timers: 1
• Operating Supply Voltage: 1.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TQFN-EP-16
• Development Tools By Supplier: MAXQ1004-KIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / Rohs Status: Details

The MAXQ1004 is a low-power, high-performance, 16-bit
MAXQ microcontroller providing the high security and
reliability demanded in today’s portable electronics, bat-
tery chargers, and battery packs. An ISO/IEC 9797-1
standards-based authentication protocol is available as
standard application code.
A 1-Wire communication interface minimizes battery-
pack connections required to authenticate and monitor
battery health. The 1-Wire I/O pin (DQ) can wake the
device from low-power stop mode. In stop mode, power
is supplied only to the circuitry required to wake up the
slave microcontroller. During stop mode, 512 bytes of
data memory are preserved, with an option to preserve
the CPU state and the remaining 128 bytes of data
memory.
The microcontroller is based on a low-power implemen-
tation of the 16-bit MAXQ family of RISC cores. The core
supports the Harvard memory architecture with separate
16-bit program and data address buses. A fixed 16-bit
instruction word is standard, but data can be arranged in
8 or 16 bits. The core is implemented as a pipelined pro-
cessor with performance approaching 1MIPS per MHz.
The 16-bit data path is implemented around register
modules, and each register module contributes specific
functions to the core. The accumulator module consists
of sixteen 16-bit registers and is tightly coupled with the
arithmetic logic unit (ALU).
Execution of instructions is triggered by data transfer
between functional register modules or between a func-
tional register module and memory. Because data move-
ment involves only source and destination modules,
circuit-switching activities are limited to active modules
only. For power-conscious applications, this approach
localizes power dissipation and minimizes switching
noise. The modular architecture also provides a maxi-
mum of flexibility and reusability that is important for a
microprocessor used in embedded applications.
The MAXQ instruction set is highly orthogonal. All arith-
metical and logical operations can use any register
in conjunction with the accumulator. Data movement
is supported from any register to any other register.
Memory is accessed through specific data-pointer regis-
ters with automatic increment/decrement support.
1-Wire and SPI Authentication Microcontroller
10
MAXQ Core Architecture
Detailed Description
There are three distinct memory areas: registers, pro-
gram memory, and data memory. All registers are
located on-chip. The device contains built-in program
and data memory, including:
• 16KB flash memory, in-application programmable
• 640B of data RAM
• 4KB of ROM
Program flash memory is arranged in 1024-byte pages
that can be individually erased and programmed through
the use of utility ROM functions.
The utility ROM is a block of internal ROM that defaults to
a starting address of 8000h. The utility ROM consists of
subroutines that can be called from application software.
These include the following:
• In-system programming using a bootstrap loader
• Test routines (internal memory tests, memory loader,
• User-callable routines for in-application flash program-
Following any reset, execution begins in the utility ROM.
The ROM software determines whether the program
execution should immediately jump to location 0000h,
the start of application code, or to one of the special
routines mentioned. Routines within the utility ROM are
user-accessible and can be called as subroutines by the
application software. More information on the utility ROM
functions is contained in the MAXQ1004 User’s Guide.
Some applications require protection against unau-
thorized viewing of program code memory. For these
applications, access to in-system programming, in-
application programming, or in-circuit debugging func-
tions is prohibited until a password has been supplied.
The password is defined as the 16 words of physical
program memory at addresses 0010h–001Fh.
A single password lock (PWL) bit is implemented in
the SC register. When the PWL is set to one (POR
default) and the contents of the memory at addresses
0010h–001Fh are any value other than FFh or 00h, the
password is required to access the utility ROM, includ-
ing in-circuit debug and in-system programming routines
that allow reading or writing of internal memory. When
PWL is cleared to zero, these utilities are fully accessible
without the password. The password is automatically set
to all ones following a mass erase.
etc.)
ming and fast table lookup
Memory Organization
Utility ROM