LFE2-12SE-5TN144C Lattice, LFE2-12SE-5TN144C Datasheet - Page 97

• Manufacturer Part Number: LFE2-12SE-5TN144C
• Description: FPGA - Field Programmable Gate Array 12K LUTs S-Series 1.1.2V -5 Spd
• Manufacturer: Lattice

Specifications of LFE2-12SE-5TN144C

• Number Of Macrocells: 12000
• Maximum Operating Frequency: 320 MHz
• Number Of Programmable I/os: 93
• Data Ram Size: 226304
• Delay Time: 12 ns
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Package / Case: TQFP-144
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Lead Free Status / Rohs Status: Details

Lattice Semiconductor
Figure 3-16. sysCONFIG Slave Serial Port Timing
Figure 3-17. Power-On-Reset (POR) Timing
Figure 3-18. Configuration from PROGRAMN Timing
V
V
1. Time taken from V
2. Device is in a Master Mode (SPI, SPIm).
3. The CFG pins are normally static (hard wired).
PROGRAMN
CCLK (input)
1. The CFG pins are normally static (hard wired)
CC
CCIO8
USER I/O
CFG[2:0]
CFG[2:0]
/ V
DONE
DONE
INITN
CCLK
CCAUX
1
INITN
CCLK
DOUT
DIN
2
3
1
/
CC
, V
CCAUX
t
t
DPPINIT
DINITD
or V
CCIO8
t
IODISS
, whichever is the last to cross the POR trip point.
t
PRGMRJ
t
ICFG
t
SUSCDI
t
VMC
3-46
t
SSCL
Valid
DC and Switching Characteristics
LatticeECP2/M Family Data Sheet
t
CODO
t
DINIT
t
SSCH
t
HSCDI
Valid