531FB200M000DG Silicon Laboratories Inc, 531FB200M000DG Datasheet - Page 3
531FB200M000DG
Manufacturer Part Number
531FB200M000DG
Description
Standard Clock Oscillators SINGLE XO 6 PIN 0.3PS RMS JTR
Manufacturer
Silicon Laboratories Inc
Series
531r
Datasheet
1.531FB200M000DG.pdf
(12 pages)
Specifications of 531FB200M000DG
Product
XO
Package / Case
7 mm x 5 mm
Frequency
200 MHz
Frequency Stability
20 PPM
Supply Voltage
2.5 Volts
Termination Style
Solder Pad
Minimum Operating Temperature
- 40 C
Maximum Operating Temperature
+ 85 C
Dimensions
5 mm W x 7 mm L
Height
1.65 mm
Mounting Style
SMD/SMT
Lead Free Status / Rohs Status
Compliant
Table 2. CLK± Output Frequency Characteristics (Continued)
Table 3. CLK± Output Levels and Symmetry
Total Stability
Powerup Time
Notes:
LVPECL Output Option
LVDS Output Option
CML Output Option
CMOS Output Option
Rise/Fall time (20/80%)
Symmetry (duty cycle)
Notes:
1. See Section 3. "Ordering Information" on page 7 for further details.
2. Specified at time of order by part number. Also available in frequencies from 970 to 1134 MHz and 1213 to 1417 MHz.
3. Selectable parameter specified by part number.
4. Time from powerup or tristate mode to f
1. 50 Ω to V
2. R
3. C
Parameter
term
L
= 15 pF
Parameter
= 100 Ω (differential).
4
DD
– 2.0 V.
2
2
3
1
Symbol
SYM
t
V
V
V
V
V
V
R,
V
V
V
OD
OD
OD
OH
SE
OL
O
O
O
t
F
Symbol
t
OSC
LVPECL:
LVDS:
CMOS:
O
CMOS with C
.
swing (single-ended)
LVPECL/LVDS/CML
Test Condition
I
I
OH
swing (diff)
OL
swing (diff)
swing (diff)
Temp stability = ±20 ppm
Temp stability = ±50 ppm
Temp stability = ±7 ppm
mid-level
mid-level
mid-level
V
1.25 V (diff)
V
= 32 mA
= 32 mA
DD
DD
Rev. 1.1
Test Condition
/2
– 1.3 V (diff)
L
= 15 pF
V
0.8 x V
DD
1.125
0.55
0.70
Min
1.1
0.5
45
—
—
—
—
– 1.42
DD
Min
—
—
—
—
V
DD
0.95
1.20
Typ
0.7
—
—
—
—
—
—
—
– 0.75
1
Typ
—
—
—
—
Si530/531
V
DD
±31.5
±61.5
1.275
Max
Max
0.95
1.20
±20
V
350
1.9
0.9
0.4
10
55
—
—
– 1.25
DD
Units
ppm
ppm
ppm
Units
ms
V
V
V
V
ps
ns
%
V
V
V
V
PP
PP
PP
PP
3