TOIM4232-TR3 Vishay, TOIM4232-TR3 Datasheet - Page 15

• Manufacturer Part Number: TOIM4232-TR3
• Description: IC SIR ENDEC IRDA 115.2K 16-SOIC
• Manufacturer: Vishay
• Type: Infrared Encoder/Decoderr

Specifications of TOIM4232-TR3

• Voltage - Supply, Analog: 2.7 V ~ 3.6 V
• Voltage - Supply, Digital: 2.7 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Data Transmission Rate: 2.4 Kbits/s to 115.2 Kbits/s
• Mounting Style: SMD/SMT
• Operating Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 25 C
• Ic Function: SIR Endec For IrDA Application
• Brief Features: Pulse Shaping Function, Programmable Baud Clock Generator, Low Operating Current
• Supply Voltage Range: 2.7V To 3.6V
• Operating Temperature (min): -25C
• Operating Temperature Classification: Commercial
• Operating Temperature (max): 85C
• Package Type: SOIC
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Applications: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 751-1200-2

The endec stretches the received pulses of about 2 µs
duration from the transceiver output (figure 10, channel 1)
independent of the pulse duration to the full bit width
generating NRZ code (channel 2). Channel 3 is the signal for
the indicator lamp.
As shown in figure 11, channels 2 and 3, the final NRZ signal
is identical to figure 10, even when longer pulses are
received.
In the 115.2 kbit/s mode the signals will look like those shown
in figure 10 and figure 11. The difference is just the time
scale. It also indicates the delay of the decoded channel 2 vs.
channel 1.
Channel 1 shows the signal from the transceiver. In this case
it is TFDU4100 with unsymmetrical switching times.
TFDU4100 (obsolete) used an open collector output with an
internal load resistor. That caused a slow trailing edge (but
fast enough for all applications). The later generations are
using tri-state outputs with push-pull drivers with symmetrical
pulse switching times. All Vishay IrDA transceivers exhibit
constant output pulse duration in SIR mode of about 2 µs
independent of the duration of the optical input pulse.
Document Number: 82546
Rev. 2.1, 17-Nov-10
1->
2->
3->
1->
2->
3->
21035
21036
1) Ch1: TOIM4232; RD_IR, pin 15, vertical scale: 2 V/div.,
2) Ch2: TOIM4232; RD_232, pin 3
3) Ch3: TOIM4232; RD_LED, pin 10
Fig. 12 - Data reception with the setting 115.2 kbit/s
Fig. 11 - Data Reception with the Setting 9.6 kbit/s.
1) Ch1: TOIM4232; RD_IR, pin 15, vertical scale: 2 V/div.,
2) Ch2: TOIM4232; RD_232, pin 3
3) Ch3: TOIM4232; RD_LED, pin 10
Same as in Figure 10, extended Pulse Duration.
horizontal scale: 200 µs/div.
horizontal scale: 10 µs/div.
[e-mail], [e-mail],
For technical questions within your region, please contact one of the following:
SIR Endec for IrDA
Integrated Interface Circuit
®
“ECHO-ON" OR "ECHO-OFF" AND "LATENCY
ALLOWANCE”
During transmission, the receiver inside a transceiver
package is exposed to very strong irradiance of the
transmitter, which causes overload conditions in the receiver
circuit. After transmission it takes some time to recover from
this condition and return to the specified sensitivity.
During this time the receiver is in an unstable condition, and
at the output unexpected signals may arise. Also, during
transmission under overload conditions the receiver may
show signals on the RXD channel that are similar to or
identical with the transmitted signal. To get clean or at least
specified conditions for the receive channel during
transmission, different terms were defined. The time to allow
the receiver to recover from overload conditions is the
latency allowance or shorter, just the specified latency. This
is covered by the IrDA physical layer specification and is a
maximum of 10 ms. IrDA specifies shorter negotiable
latency. In SIR the minimum is 0.5 ms. This includes
software latency. Transceivers are in general below 0.3 ms.
In the first generations, some suppliers did not care for the
behavior of the RXD output of the transceivers during
transmission and latency time. The software is able to handle
that. The easiest way is to clean up the receiver channel after
sending the last pulse and waiting for the latency period.
Later, many transceivers that block the RXD channel during
transmission and during the latency period were released to
the market. This behavior is called “Echo-off”. Unfortunately,
some OEMs like to use the signal from the RXD channel
during transmission, as a self-test feature for testing the
device on board without using the optical domain. Therefore,
many new devices have been developed to echo the TXD
input signal at the RXD output. Such behavior is called
“echo-on”.
Some software developed for “echo-off” applications is not
able to receive and understand the signals from echo-on
devices correctly.
Therefore, an add-on to the circuit shown in figure 4 was
generated to suppress the echo from the receiver during
transmission. This modification is shown in figure 13.
During transmission, the signal from the RXD output of the
transceiver is just gated by the transmit signal, (see the
oscilloscope picture in figure 14).
Applications
[e-mail]
Vishay Semiconductors
TOIM4232
www.vishay.com
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