MAX9526AEI+ Maxim Integrated Products, MAX9526AEI+ Datasheet - Page 20

IC VID DECODER NTSC/PAL 28-QSOP

MAX9526AEI+

Manufacturer Part Number
MAX9526AEI+
Description
IC VID DECODER NTSC/PAL 28-QSOP
Manufacturer
Maxim Integrated Products
Type
Video Decoderr
Datasheet

Specifications of MAX9526AEI+

Applications
Automotive Systems, Players, TV
Voltage - Supply, Analog
1.8V
Voltage - Supply, Digital
1.8V
Mounting Type
Surface Mount
Package / Case
28-QSOP
Operating Supply Voltage
1.8 V
Maximum Operating Temperature
+ 125 C
Bandwidth
180 Hz to 2 KHz
Maximum Power Dissipation
1009 mW
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Snr
58.8 dB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Low-Power, High-Performance
NTSC/PAL Video Decoder
Send the slave address with the R/W bit set to 1 to initi-
ate a read operation. The MAX9526 acknowledges
receipt of its slave address by pulling SDA low during
the 9th SCL clock pulse. A START command followed
by a read command resets the address pointer to reg-
ister 0x00.
The first byte transmitted from the MAX9526 is the con-
tents of register 0x00. Transmitted data is valid on the
rising edge of SCL. The address pointer autoincre-
ments after each read data byte. This autoincrement
feature allows all registers to be read sequentially within
one continuous frame. A STOP condition can be issued
after any number of read data bytes. If a STOP condi-
tion is issued followed by another read operation, the
first data byte to be read is from register 0x00.
Figure 10. I
Figure 11. START, STOP, and REPEATED START Conditions
20
SDA
SCL
______________________________________________________________________________________
SDA
SCL
2
t
C Serial Interface Timing Diagram
HD
S
,
STA
CONDITION
START
t
LOW
Sr
t
R
t
t
SU
HIGH
,
DAT
Read Data Format
t
F
t
HD
,
DAT
P
t
SU
,
STA
START CONDITION
The address pointer can be preset to a specific register
before a read command is issued. The master presets
the address pointer by first sending the MAX9526’s
slave address with the R/W bit set to 0 followed by the
register address. A REPEATED START condition is then
sent followed by the slave address with the R/W bit set
to 1. The MAX9526 then transmits the contents of the
specified register. The address pointer autoincrements
after transmitting the first byte.
The master acknowledges receipt of each read byte
during the acknowledge clock pulse. The master must
acknowledge all correctly received bytes except the
last byte. The final byte must be followed by a not
acknowledge from the master and then a STOP condi-
tion. Figure 15 illustrates the frame format for reading
one byte from the MAX9526. Figure 16 illustrates the
frame format for reading multiple bytes from the
MAX9526.
Figure 12. Acknowledge
REPEATED
SDA
SCL
CONDITION
START
t
HD
,
STA
1
2
t
SP
t
SU
,
STO
NOT ACKNOWLEDGE
ACKNOWLEDGE
CONDITION
STOP
8
ACKNOWLEDGMENT
CLOCK PULSE FOR
t
BUF
CONDITION
9
START

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