Z8623012PSG Zilog, Z8623012PSG Datasheet

no-image

Z8623012PSG

Manufacturer Part Number
Z8623012PSG
Description
IC SMART V-CHIP W/2ND I2C 18-DIP
Manufacturer
Zilog
Type
Video Decoderr
Datasheet

Specifications of Z8623012PSG

Applications
Set-Top Boxes, TV
Voltage - Supply, Digital
4.75 V ~ 5.25 V
Mounting Type
Through Hole
Package / Case
18-DIP (0.300", 7.62mm)
Processor Series
Z8623x
Core
Z80
Data Bus Width
8 bit
Program Memory Type
CMOS
Maximum Clock Frequency
12 MHz
Operating Supply Voltage
4.75 V to 5.25 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply, Analog
-
Lead Free Status / Rohs Status
 Details
Z86230
A
P
B
DVANCED
ROGRAM
LOCKING
NTSC L
21 XDS
AND
INE
D
ECODER
P
P
S
RELIMINARY
RODUCT
PECIFICATION
PS000401-TVC0699
ZiLOG W
H
• 910 E. H
A
• C
, CA 95008
ORLDWIDE
EADQUARTERS
AMILTON
VENUE
AMPBELL
T
: 408.558.8500 • F
: 408.558.8300 • I
:
://
.Z
LOG.
ELEPHONE
AX
NTERNET
HTTP
WWW
I
COM

Related parts for Z8623012PSG

Z8623012PSG Summary of contents

Page 1

... Z86230 A P DVANCED NTSC L AND RELIMINARY PS000401-TVC0699 ZiLOG W H ORLDWIDE EADQUARTERS T : 408.558.8500 • 408.558.8300 • I ELEPHONE AX B ROGRAM LOCKING 21 XDS INE ECODER S RODUCT PECIFICATION • 910 • C AMILTON VENUE AMPBELL : :// NTERNET HTTP WWW , CA 95008 .Z LOG. I COM ...

Page 2

... ZiLOG, Inc. All rights reserved. Information in this publication concerning the devices, applica- tions, or technology described is intended to suggest possible uses and may be superseded. ZiLOG, INC. DOES NOT ASSUME LIABILITY FOR OR PROVIDE A REPRESENTATION OF ACCURACY OF THE INFORMATION, DEVICES, OR TECHNOLOGY DESCRIBED IN THIS DOCUMENT. ZiLOG ...

Page 3

T C ABLE OF ONTENTS 1. A RCHITECTURAL 1. ESCRIPTIONS 3. Z86230 F 3.1. VBI D 3. ERIAL 4. OMMANDS 5.1. S 5.2. READ 5. ...

Page 4

Z86230—PRELIMINARY PS000401-TVC0699 ...

Page 5

L F IST OF IGURES F 1. IGURE F 2. IGURE F 3. IGURE F 4. IGURE F 5. IGURE F 6. IGURE F 7. IGURE F 8. IGURE F 9. IGURE F 10. 18-L IGURE F 11. 18-L IGURE ...

Page 6

Z86230—PRELIMINARY PS000401-TVC0699 ...

Page 7

L T IST OF ABLES T 1. ABLE T 2. ABLE T 3. ABLE T 4. ABLE T 5. ABLE T 6. ABLE T 7. ABLE T 8. ABLE T 9. ABLE T 10. ABLE T 11. ABLE T 12. ...

Page 8

T 39. ABLE T 40. ABLE T 41. ABLE 8 HIN/XIN ...

Page 9

B D LOCK IAGRAM AND 1. ARCHITECTURAL OVERVIEW The Z86230 is a stand-alone integrated circuit, capable of processing Extended Data Services (XDS) in Field 2 of the Vertical Blanking Interval (VBI video frame. This device conforms to the ...

Page 10

A O RCHITECTURAL IGURE UNCTIONAL LOCK IAGRAM Sliced Data Slicer Data Lock VIDEO Buffer Dual Clamp CSYNC Slice Level SCLK Serial SDA Control Port PB Test Reg INTRO NRST Status Reg SEL ...

Page 11

B D LOCK IAGRAM AND 1.1.1 Input Signals The Composite Video input should be a signal which is nominally 1.0 Volt p-p, with sync tips negative and band limited to 600 kHz. The Z86230 operates with an input level variation ...

Page 12

A O RCHITECTURAL 1.1.6 Decoder Control Circuit The Decoder Control circuit block is the users communications port. This circuit converts the information from the control port into the internal control signals required to establish the operating mode of the decoder. ...

Page 13

B D LOCK IAGRAM AND 2. PIN DESCRIPTIONS There are 2 different packages, 18-pin DIP and 18-pin SOIC, available in the Z86230 18-P IGURE ABLE IN ESCRIPTIONS Symbol Pin # Function ...

Page 14

ESCRIPTIONS ABLE IN ESCRIPTIONS Symbol Pin # Function HIN/XIN 5 Horizontal In/XTAL In Input V 6 Power Supply SS (digital) GND VIDEO 7 Composite Video CSYNC 8 Composite Sync LOCK ...

Page 15

B D LOCK IAGRAM AND ABLE IN ESCRIPTIONS Symbol Pin # Function LPF 9 Loop Filter RREF 10 Resistor Reference V (A) 11 Power Supply SS (Anlalog) GND V 12 Power Supply + ...

Page 16

Z86230 F EATURE 3. Z86230 FEATURE SET The primary features of the Z86230 are briefly described below. More complete descriptions can be found in later sections of this document. 3.1 VBI D P ATA ROCESSING The Z86230 extracts the XDS ...

Page 17

S ETUP AND 3 ETUP AND PERATIONAL The Z86230 is fully programmable through its flexible I port. The following tables provide a partial list of User-Programmable Features and Default Conditions upon ABLE Feature Video Standard ...

Page 18

S C ERIAL OMMUNICATIONS 4. SERIAL COMMUNICATIONS INTERFACE Commands and data are sent to and from the Z86230 through its I munications interface. This port is the path for setting the configuration and oper- ational modes of the device. The ...

Page 19

Acknowledge. edge after the reception of each byte. The master device must generate the clock for the Acknowledge bit. Acknowledge is is SDA = High Data. The data ( SCLK , MSB edge of ...

Page 20

S C ERIAL OMMUNICATIONS IGURE One-Byte WRITE (Command) START Two-Byte WRITE (Command & Data) START N : The Status Register RDY bit must be read and checked prior to the START ...

Page 21

All READ set multiple-byte condition. If the START attempt to read any data bytes or the required data can be lost from the Z86230 output registers. The I to acknowledge the ...

Page 22

S C ERIAL OMMUNICATIONS 4.1.7 STOP Condition A Low-to-High transition of minates all communications. 4.1.8 Acknowledge All address and data words are serially transmitted to and from the Z86230 in eight bit words. A ninth bit time is used for ...

Page 23

S P ERIAL ORT 5. COMMANDS 5 ERIAL ORT OMMANDS The commands must be contained within the Start–Slave Address–etc. sequence. In the following Command descriptions, the letter h following a command code N : OTE designates hexadecimal ...

Page 24

C OMMANDS T 8. RDS1–READ O ABLE Bit R/W 5.2.3 RDS2 = 60h–70h RDS2 is a 1-byte command which is used to initiate a 2-byte moving the contents of the two consecutive registers, starting with the one identi- fied by ...

Page 25

R EGISTERS 6. CONTROL REGISTERS Information controlling the setup and operation of the Z86230 are maintained in several registers. The user may read or alter the contents of these registers as required. All register diagrams indicated in this section incorporate ...

Page 26

C R ONTROL EGISTERS D –TVS. 0 The default is lines per display row. Reserved D -Res -Res 6.1.3 XDS Data Activity Register T 13. XDS D ABLE Bit R/W Reserved. D -Res ...

Page 27

R EGISTERS T 15. XDS S ABLE Secondary Filter All Time Information In Band Only Content Advisory VCR Information Reserved Reserved Reserved Notes: 1. Setting this register to through D the Secondary Filter (bits D XDS data are output (even ...

Page 28

C R ONTROL EGISTERS any valid bit position the Interrupt Request Register is equivalent to CLEARing an inter- rupt request on that bit. 6.1.6 Interrupt Mask Register T 17. I ABLE Bit R/W This register identifies which activities in the ...

Page 29

R EGISTERS Reserved. This bit must be kept Low(0). D -Res. 7 The Z86230 outputs Low when a bit in this register is set to Low, and the incoming N : OTE video program possesses the corresponding MPAA Rating. The ...

Page 30

C R ONTROL EGISTERS Parental Guidelines Ratings in the incoming video program. This control register is for the base rating of TV Parental Guidelines. 6.1.9 Content Advisory Ratings Select Register 3 This register holds the TV Parental Guidelines (V and ...

Page 31

R EGISTERS 6.1.10 Content Advisory Ratings Select Register 4 This register holds the TV Parental Guidelines (L and D Content) Content Advi- sory selections made by the viewer. T 21. C ABLE Bit R/W D -TV-PG-D. 0 gram is TV-PG-D-rated ...

Page 32

C R ONTROL EGISTERS These bits hold the corresponding information recovered from the first byte of the received Content Advisory Ratings packet. This bit indicates the blocking status. When this bit is High, it indicates ...

Page 33

R EGISTERS The Z86230 outputs High on pin 13 when the incoming video program -E. 0 rated according to the Canadian English Language Ratings standards, and this bit is set to High. The Z86230 outputs High on ...

Page 34

C R ONTROL EGISTERS T 26. C ABLE Bit R/W The Z86230 outputs High on pin 13 when the incoming video program -E. 0 rated according to the Canadian French Language Ratings standards, and this bit is ...

Page 35

XDS D ATA D -D -Res 6.2 XDS D R ATA ECOVERY The Z86230 is able to recover Extended Data Services (XDS) information from the input video signal. This data, formatted according to EIA-608A, can contain a wide ...

Page 36

C R ONTROL EGISTERS T 28. XDS D ABLE {WRITE Command, Filter Code} {C5,41} {C5,61} {C5,1F} {C5,01} {C5,28} {C5,9F} 6.2.1 Filtered XDS Data Format Filtered XDS data is output from the Z86230 in the order it is received on Line ...

Page 37

XDS D ATA The XDS filters on the Z86230 greatly reduce the amount of Field 2 data passed on to the master device for further processing and interpretation; however, the master device must still interpret the filtered data stream in ...

Page 38

C R ONTROL EGISTERS 6.3 Z86230 C OMMANDS AND T 29. Z86230 S ABLE Name RESET NOP RDS1 RDS2 WRxx RBS 38 Z86230 EGISTERS UMMARY C C UMMARY OF ONTROL OMMANDS Code Function RESET is 1-byte command ...

Page 39

P ROGRAM T 30. S Z86230 I ABLE UMMARY OF Register Name Addr Serial Status None Register (SSR) Configuration 00h XDS Data Activity 04h XDS Filter 05h Interrupt Request 06h Register Interrupt Mask 07h Register Content Advisory 08h Rating Select ...

Page 40

C R ONTROL EGISTERS Table 31. MPAA Matrix (Use Content Advisory Rating Register 08h PG-13 R NC- 32 ABLE ARENTAL UIDELINES – – F – – ...

Page 41

P ROGRAM T 33. C ABLE 14+ 18+ T 34. C ABLE E G 8ans+ 13ans+ 16ans+ 18ans+ PS000401-TVC0699 B M LOCKING ANADIAN NGLISH ATRIX C8+ F ...

Page 42

... Z86230. The three programs available are titled grams compile and run satisfactorily with the Z86230 in a test board. Compiled versions are available on disk. Contact your local ZiLOG sales office for further information on these programs. 7.3 IICO P ...

Page 43

G C ENERAL 7 ENERAL OMMANDS Serial Command RESET NOP SSB 7.5 SCRIPTI P ROGRAM This program is designed to send any number 2-byte commands to the Z86230. The list of commands to be executed ...

Page 44

D P EMONSTRATION 7.6.1 Configuration Register Script Files T 35. C ABLE File Name FIGVH FIGN FIGPAL 7.6.2 XDSCAP Program This program performs the task of XDS data recovery. XDS recovery must first be enabled through the appropriate XDS Filter ...

Page 45

S F CRIPT ILES 7.6.3 XDS Filter Register Script Files File Name FILA FIL0 FILCA FILC FILFA FILCH FILM FILTIME FILVCR PS000401-TVC0699 Command Function {C5,1F} Set XDS filter to all {C5,00} Set XDS filter to none; turns off XDS recovery ...

Page 46

E C LECTRICAL HARACTERISTICS 8. ELECTRICAL CHARACTERISTICS 8 BSOLUTE AXIMUM Symbol Parameter V DC Supply Voltage Input Voltage Output Voltage OUT I DC Input Current per Pin C : AUTION IN ...

Page 47

DC C HARACTERISTICS 8 HARACTERISTICS T 36 —T ABLE HARACTERISTICS Symbol Parameter V Input Voltage Low IL V Input Voltage High IH V Output Voltage Low OL V Output Voltage High OH I Input Leakage IL ...

Page 48

E C LECTRICAL HARACTERISTICS T 38. N ABLE Parameter H Timing Vertical Sync Signal Minimum Signal- to-Noise Ratio to Composite Video 8.5.2 HIN/XIN Signal Input Table 39. HIN/XIN Signal Input Mode 1. HIN (Video Lock Mode) Input (HIN Lock Mode) ...

Page 49

E LECTRICAL 8.5.3 Line 21 Input Parameters (at 1.0V p-p) Line 21 must be in its proper position to the leading edge of the Vertical Sync sig- nal. T 40. L ABLE Parameter Code Amplitude Code Zero Level Start of ...

Page 50

A I PPLICATION NFORMATION 9. APPLICATION INFORMATION The recommended schematic, component placement, and PCB layout for a single- sided DIP design are provided in the following figures. I XTAL mode are chosen in the reference circuit design. EMI and noise ...

Page 51

R EFERENCE T 41. R ABLE Component PS000401-TVC0699 D ESIGNS C V ECOMMENDED OMPONENT ALUES FOR Value 470 R4 470 R5 6 0.1 C4 560 C5 0.1 C6 6800 C7 ...

Page 52

A I PPLICATION NFORMATION F 9. PCB D IGURE VIDEO 52 Z86230 R C ESIGN OF EFERENCE IRCUIT INTRO NRST 2 SCLK I C SEL SDA VDD(+5V) VSS Z86230—PRELIMINARY R D EFERENCE ...

Page 53

R EFERENCE 10. PACKAGING F 10. 18-L DIP P IGURE EAD ACKAGE F 11. 18-L SOIC P IGURE EAD ACKAGE PS000401-TVC0699 D ESIGNS D IAGRAM D IAGRAM Z86230—PRELIMINARY P ACKAGING 53 ...

Page 54

... O I RDERING NFORMATION 11. ORDERING INFORMATION Z86230 (12 MHz) Standard Temperature 18-Pin DIP Z8623012PSC For fast results, contact your local ZiLOG sale offices for assistance in ordering the part(s) required. 11 ART UMBER ESCRIPTION The ZiLOG part numbers consist of a number of components XAMPLE Standard Flow, and consists of the codes indicated in the following table. ...

Page 55

... The document states what ZiLOG knows about this product at this time, but additional features or non-con- formance with some aspects of the document may be found, either by ZiLOG or its customers in the course of further application and characterization work. In addition, ZiLOG cautions that delivery may be uncertain at times, due to start-up yield issues ...

Page 56

... S RODUCT PECIFICATION If you experience any problems while operating this product you note any inaccuracies while reading this Product Specification, please copy and complete this form, then mail or fax it to ZiLOG (see Return Information, below). We also welcome your suggestions USTOMER NFORMATION ...

Page 57

I NDEX N UMERICS 14+-rated . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 18+-rated . . . . . . ...

Page 58

E EIA–608 . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 EIA–608A . . . . . . . . . ...

Page 59

NC-17-rated . . . . . . . . . . . . . . . . . . . . . . . . . 28 Net ...

Page 60

Status register data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 RDY bit . . . . . ...

Page 61

XTAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 circuit . . . . . . . . . ...

Related keywords