MCP23S17T-E/SO Microchip Technology, MCP23S17T-E/SO Datasheet
MCP23S17T-E/SO
Specifications of MCP23S17T-E/SO
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MCP23S17T-E/SO Summary of contents
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... Packages • 28-pin PDIP (300 mil) • 28-pin SOIC (300 mil) • 28-pin SSOP • 28-pin QFN © 2007 Microchip Technology Inc. Package Types • 1 PDIP, GPB0 2 GPB1 SOIC, ...
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... SDA 3 A2:A0 Decode RESET INTA Interrupt INTB Logic DS21952B-page 2 MCP23S17 MCP23017 Serializer/ Deserializer Control 16 8 Configuration/ Control Registers GPB7 GPB6 GPB5 GPB4 GPIO GPB3 GPB2 GPB1 GPB0 GPA7 GPA6 GPA5 GPA4 GPIO GPA3 GPA2 GPA1 GPA0 © 2007 Microchip Technology Inc. ...
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... The 16-bit I/O port functionally consists of two 8-bit ports (PORTA and PORTB). The MCP23X17 can be configured to operate in the 8-bit or 16-bit modes via IOCON.BANK. © 2007 Microchip Technology Inc. MCP23017/MCP23S17 There are two interrupt pins, INTA and INTB, that can be associated with their respective ports, or can be device logically OR’ ...
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... Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. GPA6 27 23 I/O Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. GPA7 28 24 I/O Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak pull-up resistor. DS21952B-page 4 Function © 2007 Microchip Technology Inc. ...
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... Microchip Technology Inc. MCP23017/MCP23S17 1.3.1 BYTE MODE AND SEQUENTIAL MODE The MCP23X17 family has the ability to operate in Byte mode or Sequential mode (IOCON.SEQOP). Byte Mode disables automatic Address Pointer incrementing. When operating in Byte mode, the ...
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... Address Pointer. (see Section 1.3.1 “Byte Mode and Sequential Mode” for details regarding sequential operation control). The sequence ends by the raising of CS. The MCP23S17 Address Pointer will roll over to address zero after reaching the last register address. © 2007 Microchip Technology Inc. ...
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... OP - Stop P - Write w - Read R - Device opcode OP ADDR - Device register address D - Data out from MCP23017 OUT D - Data in to MCP23017 Byte S OP Sequential Byte S OP Sequential S OP © 2007 Microchip Technology Inc. MCP23017/MCP23S17 D W ADDR .... OUT .... ADDR P Byte and Sequential Write D W ADDR IN W ADDR D ...
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... R write R read 0 ACK R Register Address Register Address 2 I C™ CONTROL BYTE FORMAT Control Byte R/W ACK Slave Address R/W bit ACK bit SPI CONTROL BYTE FORMAT Control Byte R/W Slave Address R/W bit ACK © 2007 Microchip Technology Inc. ...
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... OL7 OL6 OLATB 15 OL7 OL6 © 2007 Microchip Technology Inc. MCP23017/MCP23S17 Reading the GPIOn register reads the value on the port. Reading the OLATn register only reads the latches, not the actual value on the port. Writing to the GPIOn register actually causes a write to the latches (OLATn) ...
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... GPINT1 GPINT0 0000 0000 DEF1 DEF0 0000 0000 IOC1 IOC0 0000 0000 INTPOL — 0000 0000 PU1 PU0 0000 0000 INT1 INTO 0000 0000 ICP1 ICP0 0000 0000 GP1 GP0 0000 0000 OL1 OL0 0000 0000 © 2007 Microchip Technology Inc. ...
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... ICP7 ICP6 INTCAPB 11 ICP7 ICP6 GPIOA 12 GP7 GP6 GPIOB 13 GP7 GP6 OLATA 14 OL7 OL6 OLATB 15 OL7 OL6 © 2007 Microchip Technology Inc. MCP23017/MCP23S17 ) 0 bit 5 bit 4 bit 3 bit 2 IO5 IO4 IO3 IO2 IO5 IO4 IO3 IO2 IP5 IP4 IP3 IP2 IP5 IP4 ...
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... IO7:IO0: These bits control the direction of data I/O <7:0> Pin is configured as an input Pin is configured as an output. DS21952B-page 12 R/W-1 R/W-1 R/W-1 IO4 IO3 IO2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R/W-1 R/W-1 IO1 IO0 bit Bit is unknown © 2007 Microchip Technology Inc. ...
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... IP7:IP0: These bits control the polarity inversion of the input pins <7:0> GPIO register bit will reflect the opposite logic state of the input pin GPIO register bit will reflect the same logic state of the input pin. © 2007 Microchip Technology Inc. MCP23017/MCP23S17 R/W-0 ...
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... Enable GPIO input pin for interrupt-on-change event Disable GPIO input pin for interrupt-on-change event. Refer to INTCON and GPINTEN. DS21952B-page 14 R/W-0 R/W-0 R/W-0 GPINT4 GPINT3 GPINT2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R/W-0 R/W-0 GPINT1 GPINT0 bit Bit is unknown © 2007 Microchip Technology Inc. ...
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... DEF7:DEF0: These bits set the compare value for pins configured for interrupt-on-change from defaults <7:0>. Refer to INTCON. If the associated pin level is the opposite from the register bit, an interrupt occurs. Refer to INTCON and GPINTEN. © 2007 Microchip Technology Inc. MCP23017/MCP23S17 R/W-0 R/W-0 ...
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... Controls how the associated pin value is compared for interrupt-on-change Pin value is compared against the previous pin value. Refer to INTCON and GPINTEN. DS21952B-page 16 R/W-0 R/W-0 R/W-0 IOC4 IOC3 IOC2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R/W-0 R/W-0 IOC1 IOC0 bit Bit is unknown © 2007 Microchip Technology Inc. ...
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... BANK bit is set. For this reason advised to only perform byte writes to this register when changing the BANK bit. © 2007 Microchip Technology Inc. MCP23017/MCP23S17 The MIRROR bit controls how the INTA and INTB pins function with respect to each other. ...
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... INTPOL: This bit sets the polarity of the INT output pin Active-high Active-low. bit 0 Unimplemented: Read as ‘0’. DS21952B-page 18 R/W-0 R/W-0 R/W-0 DISSLW HAEN ODR U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R/W-0 U-0 INTPOL — bit Bit is unknown © 2007 Microchip Technology Inc. ...
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... W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 7-0 PU7:PU0: These bits control the weak pull-up resistors on each pin (when configured as an input) <7:0> Pull-up enabled Pull-up disabled. © 2007 Microchip Technology Inc. MCP23017/MCP23S17 R/W-0 R/W-0 R/W-0 PU4 PU3 PU2 U = Unimplemented bit, read as ‘ ...
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... INT7:INT0: These bits reflect the interrupt condition on the port. Will reflect the change only if interrupts are enabled (GPINTEN) <7:0> Pin caused interrupt Interrupt not pending. DS21952B-page 20 R-0 R-0 R-0 INT4 INT3 INT2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared © 2007 Microchip Technology Inc. R-0 R-0 INT1 INT0 bit Bit is unknown ...
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... W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 7-0 ICP7:ICP0: These bits reflect the logic level on the port pins at the time of interrupt due to pin change <7:0> Logic-high Logic-low. © 2007 Microchip Technology Inc. MCP23017/MCP23S17 R-x R-x R-x ICP4 ICP3 ICP2 U = Unimplemented bit, read as ‘ ...
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... GP7:GP0: These bits reflect the logic level on the pins <7:0> Logic-high Logic-low. DS21952B-page 22 R/W-0 R/W-0 R/W-0 GP4 GP3 GP2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R/W-0 R/W-0 GP1 GP0 bit Bit is unknown © 2007 Microchip Technology Inc. ...
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... R = Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 7-0 OL7:OL0: These bits reflect the logic level on the output latch <7:0> Logic-high Logic-low. © 2007 Microchip Technology Inc. MCP23017/MCP23S17 R/W-0 R/W-0 R/W-0 OL4 OL3 OL2 U = Unimplemented bit, read as ‘0’ ...
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... After reading GPIO, the interrupt will clear and then set due to the pending IOC, causing the INTCAP register to update. Clear Unchanged Unchanged Clear Unchanged Unchanged Clear Register 1-3 and 1-3, Register 1-5 and Register 1-4. © 2007 Microchip Technology Inc. ...
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... FIGURE 1-6: INTERRUPT-ON-PIN CHANGE GPx INT ACTIVE Port value Read GPIO Port value is captured or INTCAP is captured into INTCAP into INTCAP © 2007 Microchip Technology Inc. MCP23017/MCP23S17 FIGURE 1-7: GP GP2 Pin INT Pin Port value is captured into INTCAP ACTIVE ...
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... MCP23017/MCP23S17 NOTES: DS21952B-page 26 © 2007 Microchip Technology Inc. ...
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... The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., out- side specified power supply range) and therefore outside the warranted range. © 2007 Microchip Technology Inc. MCP23017/MCP23S17 (except V ) ...
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... For entire V range DD ≤ V ≤ V µ PIN DD ≤ V ≤ V µ PIN DD µ 5V, GP Pins = –40°C ≤ T ≤ +85° 8 1 3 3 -3 -400 µ 1. © 2007 Microchip Technology Inc. ...
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... FIGURE 2-1: LOAD CONDITIONS FOR DEVICE TIMING SPECIFICATIONS SCL and SDA pin MCP23017 FIGURE 2-2: RESET AND DEVICE RESET TIMER TIMING V DD RESET Internal RESET Output pin © 2007 Microchip Technology Inc. MCP23017/MCP23S17 V DD Pin 1 kΩ 135 DS21952B-page 29 ...
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... T ≤ +125°C (E-Temp) (Note (1) Sym Min Typ Max T 1 — — RSTL T — 0 — HLD T — — 1 IOZ 100 101 106 107 109 Units Conditions µ 5.0V DD µ Stop Condition 102 92 110 © 2007 Microchip Technology Inc. ...
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... MHz mode Note 1: This parameter is characterized, not 100% tested specified to be from 10 to 400 pF. B © 2007 Microchip Technology Inc. MCP23017/MCP23S17 Operating Conditions (unless otherwise indicated): 1.8V ≤ V ≤ 5.5V at -40°C ≤ T ≤ +85°C (I-Temp 4.5V ≤ V ≤ ...
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... N/A µs 4.5V – 5.5V (E-Temp) 400 pF Note 1 100 pF Note Spike suppression off LSB in © 2007 Microchip Technology Inc. ...
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... Data Hold Time 6 CLK Rise Time 7 CLK Fall Time 8 Clock High Time Note 1: This parameter is characterized, not 100% tested. © 2007 Microchip Technology Inc. MCP23017/MCP23S17 13 Don’t Care Operating Conditions (unless otherwise indicated): 1.8V ≤ V ≤ 5.5V at -40°C ≤ T ≤ +85°C (I-Temp 4.5V ≤ ...
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... CLE T — — — — 45 — — — — — — 100 DIS Inactive 53 52 Conditions ns 1.8V–5.5V (I-Temp) ns 2.7V–5.5V (I-Temp) ns 4.5V–5.5V (E-Temp 1.8V–5.5V (I-Temp) ns 2.7V–5.5V (I-Temp) ns 4.5V–5.5V (E-Temp © 2007 Microchip Technology Inc. ...
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... GP Input Change to Register Valid 53 IOC Event to INT Active Glitch Filter on GP Pins Note 1: This parameter is characterized, not 100% tested © 2007 Microchip Technology Inc. MCP23017/MCP23S17 Operating Conditions (unless otherwise indicated): 1.8V ≤ V ≤ 5.5V at -40°C ≤ T ≤ +85°C (I-Temp 4.5V ≤ ...
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... MCP23017/MCP23S17 NOTES: DS21952B-page 36 © 2007 Microchip Technology Inc. ...
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... Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. © 2007 Microchip Technology Inc. MCP23017/MCP23S17 Example: MCP23017-E/SP^^ e ...
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... A1 .015 – E .290 .310 E1 .240 .285 D 1.345 1.365 L .110 .130 c .008 .010 b1 .040 .050 b .014 .018 eB – – Microchip Technology Drawing C04-070B MAX .200 .150 – .335 .295 1.400 .150 .015 .070 .022 .430 © 2007 Microchip Technology Inc. ...
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... Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package is saw singulated. 3. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. © 2007 Microchip Technology Inc. MCP23017/MCP23S17 EXPOSED PAD E ...
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... L 0.40 – L1 1.40 REF φ 0° – c 0.18 – b 0.31 – α 5° – β 5° – Microchip Technology Drawing C04-052B h c β MAX 2.65 – 0.30 0.75 1.27 8° 0.33 0.51 15° 15° © 2007 Microchip Technology Inc. ...
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... Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.20 mm per side. 3. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. © 2007 Microchip Technology Inc. MCP23017/MCP23S17 E E1 ...
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... MCP23017/MCP23S17 NOTES: DS21952B-page 42 © 2007 Microchip Technology Inc. ...
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... Table 2-4, Param No. 51 and 53: Changed from 450 to 600 and 500 to 600, respecively. 3. Added disclaimers to package outline drawings. 4. Updated package outline drawings. Revision A (June 2005) • Original Release of this Document. © 2007 Microchip Technology Inc. MCP23017/MCP23S17 Read in DS21952B-page 39 ...
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... MCP23017/MCP23S17 NOTES: DS21952B-page 40 © 2007 Microchip Technology Inc. ...
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... C Interface d) MCP23017-E/SS: e) MCP23017T-E/SS: Tape and Reel, a) MCP23S17-E/SP: Extended Temp., b) MCP23S17-E/SO: Extended Temp., c) MCP23S17T-E/SO: Tape and Reel, d) MCP23S17-E/SS: Extended Temp., e) MCP23S17T-E/SS: Tape and Reel, Extended Temp., 28LD PDIP package. 28LD SOIC package. Extended Temp., 28LD SOIC package. Extended Temp., 28LD SSOP package. ...
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... MCP23017/MCP23S17 NOTES: DS21952B-page 42 © 2007 Microchip Technology Inc. ...
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... Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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... Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2007 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...