SI2404-C-GT Silicon Laboratories Inc, SI2404-C-GT Datasheet - Page 16

• Manufacturer Part Number: SI2404-C-GT
• Description: IC ISOMODEM W/ERROR CORR 24TSSOP
• Manufacturer: Silicon Laboratories Inc

Specifications of SI2404-C-GT

• Mfg Application Notes: SI2493/57/34/15/04, Appl Note AN93
• Data Format: V.21, V.22, V.23, V.29, Bell 103, Bell 212A
• Baud Rates: 2.4k
• Interface: Parallel, UART
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Si2457/34/15/04
4. Functional Description
The Si2457/34/15/04 ISOmodem
embedded modem chipset with integrated direct access
arrangement (DAA) that provides a programmable line
interface to meet global telephone line requirements.
Available in two small packages, this solution includes a
DSP data pump, modem controller, on-chip RAM and
ROM, codec, DAA, analog output, and 27 MHz clock
input.
The Si2457/34/15/04 accepts standard modem AT
commands and provides connect rates up to 56/33.6/
14.4/2.4 kbps full-duplex over the Public Switched
Telephone Network (PSTN). The Si2457/34/15/04
features a complete set of modem protocols including all
ITU-T standard formats up to 56 kbps.
To provide the most flexibility, the Si2457/34/15/04
ISOmodem system-side device is offered in either a 24-
pin TSSOP or a 16-pin SOIC package. The 16-pin
version
ISOmodem and is recommended for most applications.
The 16-pin version does not support the parallel,
EEPROM or voice codec interface. If these features are
required, customers should use the 24-pin version.
The ISOmodem provides numerous additional features
for embedded modem applications. The modem includes
full type I and type II caller ID detection and decoding for
global standards. Call progress monitoring is supported
through standard result codes. The modem is also
programmable to meet global settings. Because the
Si2457/34/15/04 ISOmodem integrates the DAA, analog
features, such as parallel phone detect, overcurrent
detection, and global PTT compliance with a single
design, are included.
This device is ideal for embedded modem applications
due to its small board space, low power consumption,
and global compliance. The Si2457/34/15/04 solution
includes a silicon DAA using Silicon Laboratories’
proprietary third-generation DAA technology. This highly-
integrated DAA can be programmed to meet worldwide
PTT specifications for ac termination, dc termination,
ringer impedance, and ringer threshold. In addition, the
Si2457/34/15/04 has been designed to meet the most
stringent worldwide requirements for out-of-band energy,
billing-tone immunity, surge immunity, and safety
requirements.
The Si2457/34/15/04 allows for rapid integration into
existing modem applications by providing a serial
interface that can directly communicate to either a
microcontroller via a UART interface or a PC via an RS-
232 port. This interface allows for PC evaluation of the
modem
commands using standard terminal software.
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4.1. Serial Interface
The Si2457/34/15/04 supports asynchronous serial
communication with data terminal equipment (DTE) at
rates up to 307.2 kbps with the standard serial UART
format. Upon powerup, the UART baud rate is
automatically detected using the autobaud feature.
The serial interface also provides a hardware pin, DCD
(data carrier detect), which remains low as long as the
ISOmodem is connected.
The INT interrupt pin can be programmed to alert the
host of changes to the interrupts listed in I/O Control 0
(U70).
To ensure backward compatibility when using a 24-pin
system side option, if a pulldown resistor ≤10 kΩ is
placed between D2 (Si2457/34/15/04, pin 18) and GND
(Si2457/34/15/04, pin 6), the DTE rate is set to a
19.2 kbps baud rate (see Table 8).
4.1.1. Autobaud
The Si2457/34/15/04 includes an automatic baud rate
detection feature that allows the host to start
transmitting data at any standard DTE rate from
300 bps to 307.2 kbps. This feature is enabled by
default.
4.2. Parallel Interface (24-Pin Version Only)
The Si2457/34/15/04 digital I/O can communicate via a
parallel interface. The parallel interface is an 8-bit data
bus with a single bit address. Figure 3 on page 9 shows
the required timing for the parallel interface.
If A0 = 0, the data bus represents a read/write to the “
Parallel Interface 0 (0x00)” register on page page 64. If
A0 = 1, the data bus represents a read/write to the “
Parallel Interface 1 (0x01)” register on page page 65).
Selection of a serial or parallel I/O interface is
determined by the state of AOUT/INT (Si2457/34/15/04,
pin 15) during the rising edge of RESET. An internal
pullup resistor forces the default state to serial mode
operation. An external 10 kΩ pulldown resistor can be
connected to AOUT/INT to force selection of parallel
mode (see Table 8). Configuration of pins 3, 4, 8–11,
15–18, and 22–24 is determined by this interface
selection.