QT1106-ISG Atmel, QT1106-ISG Datasheet
QT1106-ISG
Specifications of QT1106-ISG
Available stocks
Related parts for QT1106-ISG
QT1106-ISG Summary of contents
Page 1
... QWheel™/QSlide™ (patented Charge-transfer method) (patent-pending QWheel/QSlide sensing configuration) AVAILABLE OPTIONS - +85 C ™/QS ™/QT LIDE MOSI 25 MISO 26 SNSA 27 SNSA 28 QT1106 SNSA 29 32-QFN SNSA1 30 SNSA2 31 SNSA3 32-QFN QT1106-ISG C Copyright © 2006-2007 QRG Ltd QT1106_8IR0.07_0907 QT1106 ™ IC OUCH 16 SNSB2 SNSB3 SNSB 12 SNSB SNSB 11 SNSB 10 SNSB5 ...
Page 2
... Mechanical Dimensions - 32-QFN Package 8 7.8 Part Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 7.9 Moisture Sensitivity Level (MSL Datasheet Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 8.1 Changes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 8.2 Numbering Convention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . QT1106_8IR0.07_0907 ...
Page 3
... The slider or wheel indicates absolute positions. 1.4 Slider and Wheel Construction The QT1106 can connect to either a wheel or a linear slider element (Figure 1.1). Selection of wheel or linear operation is set through an SPI command. The basis of these designs is found in US Patent 4,264,903 (expired). ...
Page 4
... Run mode has, in consequence, the highest power drain of all the QT1106 operating modes but the fastest response time. 1.7.3 LP Mode In LP (low power) mode, the QT1106 spends most of the time sleeping to conserve power; it wakes itself periodically to perform acquire bursts, then normally goes back to sleep again. ...
Page 5
... This is important for sense channels that have an open or short circuit fault across Cs. Such channels would otherwise cause very long acquire bursts, and in consequence would slow the operation of the entire QT1106. 5 QT1106_8IR0.07_0907 ...
Page 6
... Sense pin Open Sense pin Open SPI handshake line - - - SPI serial bit clock - Idle high, slave select line - Data from host to QT1106 - Data from QT1106 to host - Sense pin Open Sense pin Open Sense pin Open Sense pin position 43 Open Sense pin position 85 ...
Page 7
... The required value of the spread-spectrum capacitor (Css) will vary according to the lengths of the acquire bursts. A typical value is 100nF-220nF. • When the QT1106 is running the OSC pin has a DC voltage typically between 1V and 1.5V; the use of spread spectrum will cause a small low-frequency variation in the voltage. The internal oscillator signal is not visible on this pin. ...
Page 8
... Lq The host must always transfer three bytes in succession within the allotted time (10ms maximum). If all bytes are not received in this interval it is treated by the QT1106 as an error and the DRDY line will go low before the transmission is completed. Messages from the host to the QT1106 carry configuration information ...
Page 9
... QT1106. The response to these three bytes is three data bytes containing key detection information. A downloadable host-driver software example for controlling the QT1106 can be found on the Quantum website at http://www.qprox.com/toolbox, then click QT1106. There are two command modes, selectable through bit CT. ...
Page 10
... If LPS = 0, the device was in Free Run mode. Figure 3.2 Wheel and Slider Resolution (see end of Section 3.5.2) SNSA SNSA SNSA SNSA SNSA SNSA A2 A3 SNSA Bit CT Wheel/Slider Threshold Bit LPS Position Wheel Mode SNSA SNSA SNSA bits SNSA SNSA SNSA bits QT1106_8IR0.07_0907 CTL SNSA SNSA bits ...
Page 11
... DRDY during LP Mode: DRDY remains high while the QT1106 is sleeping, to indicate to the host that SPI communications are possible mode, the host should wake the QT1106 using a pulse on /SS before transferring data over SPI (see below). During an actual acquire burst, DRDY is held low. ...
Page 12
... Wake Pulse in LP Mode mode the host should wake the device from sleep using a low pulse on /SS. The pulse should be at least 125µs wide. Within 100µs of the end of the /SS pulse, the QT1106 will take DRDY low for at least 40µs to indicate that it has received the /SS wake pulse. ...
Page 13
... In many applications of Sync mode the DI filter will need to be set to two counts, to avoid the QT1106 response time being unacceptably lengthened as a consequence of this. 13 QT1106_8IR0.07_0907 ...
Page 14
... DRDY will drive low and CHANGE will drive high. 5.2 Delay to SPI Functionality The QT1106 SPI interface is not operational while the device is being reset. However, SPI is made operational early in the start-up procedure. After any reset (either via the /RST pin or via power-up), SPI typically becomes operational within 100ms of /RST going high or power-up ...
Page 15
... For proper operation a 0.1µF, or greater, bypass capacitor must be used between Vdd and Vss; the bypass capacitor should be routed with very short tracks to the QT1106's Vss and Vdd pins. 6.7 PCB Layout and Construction Refer to the Application Note AN-KD02 ‘ ...
Page 16
... Total for all three acquire burst ms groups 280ms LP setting six counts ms End of touch Units Notes mA Vdd = 5.0 Vdd = 4.0 Vdd = 3.6 Vdd = 3.3 Vdd = 2.8 µA Vdd = 3.0 µA Vdd = 3.0 µA Vdd = 3.0 Required for start-up, w/o V/s external reset cct V V QT1106_8IR0.07_0907 ...
Page 17
... Must be consecutive or detection fails 2 samples Must be consecutive or detection fails 2 samples 8 counts Threshold for decrease of Cx load 6 samples 1 samples 10, 20, In these modes: Free Run, 200ms LP, 280ms LP, Sync with 55Hz 60, secs sync infinite 17 Max Units Notes 0.5 V 7mA sink V 2.5mA source ±1 µA bits µs QT1106_8IR0.07_0907 ...
Page 18
... Rb1 = 18k ohms Rb1 = 15k ohms 4.5 5 5.5 4.5 5 5.5 4.5 5 5.5 18 QT1106 Idd (LP 200ms mode) uA 1250 1000 750 500 250 0 2.5 3 3.5 4 4.5 Vdd (V) QT1106 Idd (LP 440ms mode) uA 500 400 300 200 100 0 2.5 3 3.5 4 4.5 Vdd (V) QT1106 Idd (Sleep mode 2 ...
Page 19
... Rb1 = 12k ohms, Rb2 = 27k ohms, Css = 100nF 4.5 5 5.5 4.5 5 5.5 4.5 5 5.5 19 QT1106 Idd (LP 200ms mode) uA 1250 1000 750 500 250 0 2.5 3 3.5 4 4.5 Vdd (V) QT1106 Idd (LP 440ms mode) uA 500 400 300 200 100 0 2.5 3 3.5 4 4.5 Vdd (V) QT1106 Idd (Sleep mode ...
Page 20
... REF - 5.00 5.10 - 3.65 5.00 5.10 - 3.65 0.50 - 0.40 0.50 - 0.075 QT1106 ©QRG 8I YYWWG run nr. Two lines of text to ensure product traceability: 'YY' = Year of manufacture, 'WW' = Week of manufacture, 'G' = Green/RoHS Compliant, 'run nr.' = Run Number 20 QRG Part Number QRG Revision Code QT1106_8IR0.07_0907 ...
Page 21
... Moisture Sensitivity Level (MSL) MSL Rating MSL3 lQ Peak Body Temperature Specifications O 260 C IPC/JEDEC J-STD-020C 21 QT1106_8IR0.07_0907 ...
Page 22
... A minor chip revision (N) is defined as a revision change which does not affect product functionality or datasheet. lQ Part Number QT1106_MXN.nn_mmyy N = Minor chip revision Prereleased Product [ Released Product]) The value usually only stated for released parts (R). 22 Datasheet Issue Number Datasheet Release Date; (Where mm = Month Year) QT1106_8IR0.07_0907 ...
Page 23
... NOTES QT1106_8IR0.07_0907 ...
Page 24
Tel: +44 (0)23 8056 5600 Fax: +44 (0)23 8045 3939 The specifications set out in this document are subject to change without notice. All products sold and services supplied by QRG are subject to QRG’s Terms and Conditions of ...