MAX1464AAI+ Maxim Integrated Products, MAX1464AAI+ Datasheet
MAX1464AAI+
Specifications of MAX1464AAI+
Related parts for MAX1464AAI+
MAX1464AAI+ Summary of contents
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... GMR and MR Magnetic Direction Sensors Functional Diagram and Detailed Block Diagram appear at end of data sheet. SPI is a trademark of Motorola, Inc. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. Sensor Signal Processor ♦ ...
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Low-Power, Low-Noise Multichannel Sensor Signal Processor ABSOLUTE MAXIMUM RATINGS .............................................................-0.3V to +6. ...........................................................-0.3V to +6.0V DDF ............................................................-0.3V to +0.3V SSF SS All Other Pins to V ...................................-0.3V to ...
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Low-Power, Low-Noise Multichannel ELECTRICAL CHARACTERISTICS (continued 4.5V to 5.5V 0V, f DDF DD SSF +25°C, unless otherwise noted.) (Note 1) A PARAMETER SYMBOL Single-Sided Input Impedance (INP1 to V ...
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Low-Power, Low-Noise Multichannel Sensor Signal Processor ELECTRICAL CHARACTERISTICS (continued 4.5V to 5.5V 0V, f DDF DD SSF +25°C, unless otherwise noted.) (Note 1) A PARAMETER SYMBOL Effective Offset Adjustment ...
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Low-Power, Low-Noise Multichannel ELECTRICAL CHARACTERISTICS (continued 4.5V to 5.5V 0V, f DDF DD SSF +25°C, unless otherwise noted.) (Note 1) A PARAMETER SYMBOL LARGE OP AMP V Input Offset ...
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Low-Power, Low-Noise Multichannel Sensor Signal Processor ELECTRICAL CHARACTERISTICS (continued 4.5V to 5.5V 0V, f DDF DD SSF +25°C, unless otherwise noted.) (Note 1) A PARAMETER SYMBOL Bit Weight BW ...
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Low-Power, Low-Noise Multichannel ELECTRICAL CHARACTERISTICS (continued 4.5V to 5.5V 0V, f DDF DD SSF +25°C, unless otherwise noted.) (Note 1) A PARAMETER SYMBOL DIGITAL INPUTS (GPIO1, GPIO2, SCLK, DI, ...
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Low-Power, Low-Noise Multichannel Sensor Signal Processor TIMING CHARACTERISTICS ( 4.5V to 5.5V 0V, f DDF DD SSF +25°C, unless otherwise noted.) (Note 1) A PARAMETER SYMBOL Programming Temperature T Internal ...
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Low-Power, Low-Noise Multichannel CS t CSS SCLK Figure 1. Serial Interface Timing Diagram (V = 5.0V +25°C, unless otherwise noted SUPPLY CURRENT ...
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Low-Power, Low-Noise Multichannel Sensor Signal Processor (V = 5.0V +25°C, unless otherwise noted ADC DNL PGA[4:0] = 01000 -4 -1.0 -0.5 0 0.5 1.0 INPUT VOLTAGE NORMALIZED TO ...
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Low-Power, Low-Noise Multichannel PIN NAME 1 OUT1SM Small Op Amp 1 Output 2 AMP1M Op Amp 1 Negative Input 3 AMP1P Op Amp 1 Positive Input 4 OUT1LG Large Op Amp 1 Output 5, 7 N.C. No Connection 6 V ...
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Low-Power, Low-Noise Multichannel Sensor Signal Processor SENSOR Figure 2. Basic Bridge Sensor Ratiometric Output Configuration Typical Application Circuit Analog ratiometric output configuration (Figure 2) pro- vides an output that is proportional to the power-supply voltage. Ratiometricity is an important consideration ...
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Low-Power, Low-Noise Multichannel On-Chip Temperature Sensing The on-chip temperature sensor changes +2mV/°C over the operating range. The ADC converts the temperature sensor in a similar manner as the sensor inputs. During an ADC conversion of the temperature sensor, the ADC ...
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Low-Power, Low-Noise Multichannel Sensor Signal Processor step mode of code execution to ease code writing and debugging. A special program instruction sequence is required to observe the other CPU registers. Table 1 lists the CPU registers. The MAX1464 incorporates 16 ...
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Low-Power, Low-Noise Multichannel INP1 INM1 INP2 INM2 TEMPERATURE SENSOR Figure 4. ADC Module Single-ended inputs can be converted by either channel initiating a conversion on the appropriate chan- nel with the ...
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Low-Power, Low-Noise Multichannel Sensor Signal Processor Coarse-Input Offset Adjustment Differential input signals that have an offset can be par- tially nulled by the input coarse-offset (CO) DAC. An off- set voltage is added to the input signal prior to gaining ...
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Low-Power, Low-Noise Multichannel SW0 SW10 OUTnSM AMPnM AMPnP OUTnLG SW11 SW5 Figure 5. DOP1 and DOP2 Modules long lengths of wire. The unity-gain buffer configuration is automatically selected, and it provides the DAC out- put signal directly to the device ...
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Low-Power, Low-Noise Multichannel Sensor Signal Processor Every function of the DOP module can be selected individ- ually (DAC, PWM amp), or two out of the three func- tions of the DOP module can be selected at the same ...
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Low-Power, Low-Noise Multichannel GPIOn_Control 40h OR 41h EDGE OR LEVEL DETECT TRI-STATE BUFFER Figure 7. GPIO1 and GPIO2 Modules face for programming of instruction code and calibra- tion coefficients. The MAX1464 serial interface can operate in 4-wire SPI-compatible mode or ...
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Low-Power, Low-Noise Multichannel Sensor Signal Processor CS SCLK IRS0 DI IRSA1 IRSA0 Figure 8. Serial Interface Data Input CS SCLK IRS0 IRS1 IRS2 IRS3 DI IRSA1 IRSA0 IRSA2 IRSA3 DO DHR15 DHR14 DHR13 DHR12 Figure 9. 4-Wire Mode Data Read ...
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Low-Power, Low-Noise Multichannel 1) Halt the CPU partition modified, enter the following command: F8 Otherwise, partition 0 is selected. 3) Turn off all analog modes (write 0000h to DHR[15:0]) ...
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Low-Power, Low-Noise Multichannel Sensor Signal Processor Program and Coefficient Memory The program and coefficient memory, FLASH partition 0, is addressed by the CPU and by the serial interface sequentially from 0000h (0 dec) to 0FFFh (4095 dec). Program execution by ...
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Low-Power, Low-Noise Multichannel Description: Perform a 16-bit logical AND operation, bit for bit, on the contents of the A-register and the contents of the X- register. Store the 16-bit result back into the A-register. The previous contents of the A-register ...
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Low-Power, Low-Noise Multichannel Sensor Signal Processor Description: Perform a 16-bit shift-left operation on the contents of X-register. The most significant bit, bit 15, is truncated and lost. If register X is any CPU register other than register R6, then a ...
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Low-Power, Low-Noise Multichannel PC-register ← PC-register + 1 (point to next instruction) CPU Cycles required: 1 cycle Description: Perform a 16-bit logical NOT operation on the contents of the X-register. Each bit is flipped to its complemen- tary value. The ...
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Low-Power, Low-Noise Multichannel Sensor Signal Processor CPU Cycles required: 1 cycle Description: Perform a 16-bit move operation from port-X to the A- register. The port-X contents are unchanged. The previous contents of A-register are overwritten and lost. The port-X can ...
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Low-Power, Low-Noise Multichannel Table 1. CPU Registers ADDRESS REF ALT NAME — 6h–Fh R6–RF — ______________________________________________________________________________________ Sensor Signal Processor FUNCTION Pointer Register. This ...
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Low-Power, Low-Noise Multichannel Sensor Signal Processor Table 2. CPU Ports ADDRESS REF General-Purpose Ports. These ports, P0–PC, can be used to hold intermediate calculation results, often-used calculation coefficients, loop counter values, event counter values, comparison limit 0h–Ch P0–PC values, etc. ...
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Low-Power, Low-Noise Multichannel Table 3. Module Registers MODULE REGISTER NAME NAME ADC_Control ADC_Data_1 ADC_Config_1A ADC_Config_1B ADC_Data_2 ADC ADC_Config_2A ADC_Config_2B ADC_Data_T ADC_Config_TA ADC_Config_TB DOP1_Data DOP1 DOP1_Control DOP1_Config DOP2_Data DOP2 DOP2_Control DOP2_Config TMR_Control Timer TMR_Config Op Amp Opamp_Config Power PO_Control Oscillator OSC_Control ...
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Low-Power, Low-Noise Multichannel Sensor Signal Processor Table 5. ADC_Control (Address = 00h) BITS NAME 15–12 — Unused. 11–8 SE[3:0] Single-ended signal source multiplexer. SE[3] = MSB. 7–3 — Unused Initiate conversion on channel 1 using ADC settings specified ...
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Low-Power, Low-Noise Multichannel Table 7. Single-Ended (SE[3:0]) PGA SE[3:0] RANGE (V/V) 0001 0.99 0010 0.99 to 244 0011 0.99 to 244 0100 0.7* 0101 0.7* DACn_OUT using 0110 0.7* DACn_OUT using 0111 0.7* 1000 0.99 to 244 1001 0.99 to ...
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Low-Power, Low-Noise Multichannel Sensor Signal Processor Table 11. ADC_Config_2B (Address = 06h) BIT NAME 15–7 — Unused. 6–4 BIAS2[2:0] ADC bias setting to use during conversion of channel 2. BIAS2[2] = MSB. 3–2 — Unused. 1–0 REF2[1:0] Reference select for ...
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Low-Power, Low-Noise Multichannel Table 16. ADC Resolution (RESn[2:0], Where RESn[2:0] RESOLUTION (BITS) 000 9 001 10 010 12 011 13 100 14 101 15 110 16 Table 18. Coarse-Offset DAC (3 Bits Plus Sign, ...
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Low-Power, Low-Noise Multichannel Sensor Signal Processor Table 19. ADC Bias Current (BIASn[2:0], Where FRACTION MAXIMUM OF FULL ADC CLOCK BIASn[2:0] BIAS FREQUENCY CURRENT (Hz) 000 1/8 125k 001 2/8 250k 010 3/8 250k 011 ...
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Low-Power, Low-Noise Multichannel Table 21. DOPn Configuration Options DOP CONFIGURATION DAC OFF, PWM OFF, op amp OFF. DAC OFF, PWM OFF, op amp ON. AMPnP and AMPnM routed amp. DAC OFF, PWM OFF, op amp ON. LG ...
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Low-Power, Low-Noise Multichannel Sensor Signal Processor Table 22. DOP Module Registers NAME ADDRESS DOP1_Data 10h DOP1_Control 11h DOP1_Config 12h DOP2_Data 13h DOP2_Control 14h DOP2_Config 15h OpAmp_Config 30h Table 23. DOP1_Control (Address = 11h) BIT NAME 15–5 — 4 ENPWM1 3–1 ...
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Low-Power, Low-Noise Multichannel Table 26. DOP2_Config (Address = 15h) BIT NAME 15–9 — Unused. 8 SELPWM2 Select PWM2 output OUT2LG OUT2SM. 7–5 — Unused. 4 SELDAC2 Select DAC2 output OUT2LG (large op-amp buffer), 0 ...
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Low-Power, Low-Noise Multichannel Sensor Signal Processor Table 28. GPIO1_Control (Address = 40h) BITS NAME 15–6 — Unused. 5 OUT1 OUT1 value is driven onto the GPIO1 pin when the output driver is enabled. 4 EN1 Enable the output driver; 1 ...
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Low-Power, Low-Noise Multichannel Table 32. Timer Prescaler Settings (PS[3:0]) PS[3:1] PS[0] 000 0 001 0 010 0 011 0 100 0 101 0 110 0 111 0 000 1 001 1 010 1 011 1 100 1 101 1 110 ...
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Low-Power, Low-Noise Multichannel Sensor Signal Processor Table 34. Oscillator Control (Address = 32h) BITS NAME DESCRIPTION 15–13 — Unused. 12–8 OSC[4:0] Oscillator trim setting. OSC[4] = MSB. 7–6 — Unused. 5–4 — Reserved 0. 3–1 — Unused. Enable clock output: ...
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Low-Power, Low-Noise Multichannel Table 37. Module Registers Summary Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Register 00h ADC_Control SE[3] Register 01h ADC_Data_1 (for Channel Input 1, Uncompensated, and Read-Only Register) MSB ...
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Low-Power, Low-Noise Multichannel Sensor Signal Processor Table 38. Internal Register Set Address (IRSA) Decoding REGISTER IRSA[3:0] NIBBLE DESCRIPTION ADDRESSED 0000 DHR[3:0] Write IRSD[3:0] to DHR[3:0]. 0001 DHR[7:4] Write IRSD[3:0] to DHR[7:4]. 0010 DHR[11:8] Write IRSD[3:0] to DHR[11:8]. 0011 DHR[15:12] Write ...
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Low-Power, Low-Noise Multichannel Table 40. Interface Mode Register (IMR) Decoding IRSD DESCRIPTION Place the MAX1464 into a 4-wire serial interface 0000 (DI cannot be connected to DO). Place the MAX1464 into a 3-wire serial interface 0001 (DI can be externally ...
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Low-Power, Low-Noise Multichannel Sensor Signal Processor INP1 INM1 INP2 MUX INM2 TEMP SENSOR LG 44 ______________________________________________________________________________________ SERIAL INTERFACE CO DAC 16-BIT CPU Σ PGA ADC DAC PWM DAC TRANSISTOR COUNT: 70,921 (not including FLASH) PROCESS: ...
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Low-Power, Low-Noise Multichannel SCLK DAC CO ______________________________________________________________________________________ Sensor Signal Processor Detailed Block Diagram 45 ...
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Low-Power, Low-Noise Multichannel Sensor Signal Processor 46 ______________________________________________________________________________________ Detailed Block Diagram (continued) ...
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