MAX9247ECM/V+ Maxim Integrated Products, MAX9247ECM/V+ Datasheet
MAX9247ECM/V+
Specifications of MAX9247ECM/V+
Related parts for MAX9247ECM/V+
MAX9247ECM/V+ Summary of contents
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... Separate Input Supply Allows Interface to 1.8V to 3.3V Logic ♦ +3.3V Core Supply ♦ Space-Saving LQFP Package ♦ -40°C to +85°C and -40°C to +105°C Operating Temperature Ranges Applications PART MAX9247ECM+ MAX9247ECM/V+ MAX9247GCM+ MAX9247GCM/V+ + Denotes a lead(Pb)-free/RoHS-compliant package. /V denotes an automotive qualified part. TOP VIEW + GND 1 ...
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DC-Balanced LVDS Serializer ABSOLUTE MAXIMUM RATINGS V to _GND........................................................-0.5V to +4.0V CC_ Any Ground to Any Ground...................................-0.5V to +0.5V OUT+, OUT- to LVDSGND ....................................-0.5V to +4.0V OUT+, OUT- Short Circuit to LVDSGND or V .............................................................Continuous CCLVDS OUT+, OUT- ...
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DC ELECTRICAL CHARACTERISTICS (continued) = 100Ω ±1%, PWRDWN = high, PRE = low +3.0V to +3.6V, R CC_ L values are +3.3V +25°C.) (Notes 1, 2) CC_ A PARAMETER SYMBOL Differential Output ...
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DC-Balanced LVDS Serializer AC ELECTRICAL CHARACTERISTICS (continued +3.0V to +3.6V 100Ω±1%, C CC_ L Typical values are +3.3V, T CC_ A PARAMETER SYMBOL Serializer Delay PLL Lock Time Power-Down Delay Peak-to-Peak ...
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R = 100Ω +25°C, unless otherwise noted.) CC_ L A WORST-CASE PATTERN SUPPLY CURRENT vs. FREQUENCY WITH PREEMPHASIS 40 30 WITHOUT PREEMPHASIS FREQUENCY (MHz) ...
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DC-Balanced LVDS Serializer PIN NAME 1, 13, 37 GND Input Buffer Supply and Digital Supply Ground Input Buffer Supply Voltage. Bypass to GND with 0.1µF and 0.001µF capacitors in parallel CCIN close to the device ...
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RGB_IN CNTL_IN DE_IN PCLK_IN RNG0 RNG1 PWRDWN OUT- V (-) OS OUT+ V (-) OD (OUT+) - (OUT-) Figure 1. LVDS DC Output Load and Parameters _______________________________________________________________________________________ 27-Bit, 2.5MHz-to-42MHz DC-Balanced LVDS Serializer 1 DC BALANCE/ INPUT LATCH PAR-TO-SER ENCODE 0 ...
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DC-Balanced LVDS Serializer PCLK_IN t F Figure 2. Parallel Clock Requirements (OUT+) - (OUT-) Figure 3. Output Rise and Fall Times PCLK_IN RGB_IN[17:0] CNTL_IN[8:0] DE_IN Figure 4. Synchronous Input Timing 8 _______________________________________________________________________________________ LOW OUT+ OUT- ...
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RGB_IN CNTL_IN PCLK_IN OUT_ Figure 5. Serializer Delay PWRDWN HIGH IMPEDANCE (OUT+) - (OUT-) PCLK_IN Figure 6. PLL Lock Time PWRDWN (OUT+) - (OUT-) PCLK_IN Figure 7. Power-Down Delay _______________________________________________________________________________________ 27-Bit, 2.5MHz-to-42MHz DC-Balanced LVDS Serializer EXPANDED ...
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DC-Balanced LVDS Serializer OUT- OUT+ ((OUT+) + (OUT-))/2 Figure 8. Peak-to-Peak Output Offset Voltage Detailed Description The MAX9247 DC-balanced serializer operates at a 2.5MHz-to-42MHz parallel clock frequency, serializing 18 bits of parallel video data RGB_IN[17:0] when the data-enable ...
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CONTROL TRANSITION PHASE PHASE PCLK_IN CNTL_IN DE_IN RGB_IN = NOT SAMPLED BY PCLK_IN Figure 9. Transition Timing Transition Timing The transition words require interconnect bandwidth and displace control data. Therefore, control data is not sampled (see Figure 9): • Two ...
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DC-Balanced LVDS Serializer RGB_IN 1 0 CNTL_IN DE_IN PCLK_IN TIMING AND RNG0 PLL CONTROL RNG1 PWRDWN MAX9247 CERAMIC RF SURFACE-MOUNT CAPACITOR *CAPACITORS CAN BE AT EITHER END. Figure 10. AC-Coupled MAX9247 Serializer and MAX9250 Deserializer with Two Capacitors ...
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RGB_IN 1 0 CNTL_IN DE_IN PCLK_IN TIMING AND RNG0 PLL CONTROL RNG1 PWRDWN MAX9247 CERAMIC RF SURFACE-MOUNT CAPACITOR *CAPACITORS CAN BE AT EITHER END. Figure 12. AC-Coupled MAX9247 Serializer and MAX9248 Deserializer with Two Capacitors per Link RGB_IN 1 0 ...
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DC-Balanced LVDS Serializer AC-COUPLING CAPACITOR VALUE vs. PARALLEL CLOCK FREQUENCY 140 120 100 FOUR CAPACITORS PER LINK TWO CAPACITORS PER LINK PARALLEL CLOCK FREQUENCY (MHz) Figure 14. ...
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Wait for at least t of MAX9247 (or 17100 x t LOCK to get activity on the link 3) Power up the MAX9248 Power-Supply Circuits and Bypassing The MAX9247 has isolated on-chip power domains. The digital core supply (V ...
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DC-Balanced LVDS Serializer Chip Information PROCESS: CMOS 16 ______________________________________________________________________________________ Package Information For the latest package outline information www.maxim-ic.com/packages. PACKAGE TYPE PACKAGE CODE 48 LQFP C48+5 DOCUMENT NO. 21-0054 ...
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... Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 17 © 2009 Maxim Integrated Products 27-Bit, 2 ...