MCZ33989EG Freescale Semiconductor, MCZ33989EG Datasheet - Page 54

IC SYSTEM BASIS CHIP CAN 28-SOIC

MCZ33989EG

Manufacturer Part Number
MCZ33989EG
Description
IC SYSTEM BASIS CHIP CAN 28-SOIC
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MCZ33989EG

Applications
*
Interface
*
Voltage - Supply
*
Package / Case
28-SOIC (7.5mm Width)
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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SOFTWARE ASPECTS
Introduction
microcontroller SPI software routine that has to be executed
54
33989
TYPICAL APPLICATIONS
SUPPLEMENTAL APPLICATION NOTES
This section describes the MC33989 operation and the
TX
RX
TEC=128: the node reaches the error passive level
The DC current can be calculated as follows:
Idc= (Time in dominant * peak current of the fault) / total error frame time
Idc= (17+15)*peak current / ((23*15)+1408)=32 / 1753*peak current
Example for CANL2Vbat (peak current = - 240 mA): Idc = 32*(-) 240 / 1753=(-)4.38 mA
Rx is driven only during the glitch occuring on the CAN bus (the dominant time is shorter than a bit time)
23 recessive bits: CAN passive error frame
Node sends one dominant bit. As there is still the fault, the TEC is incremented by 8 each time.
Figure 46. Node is in Bus Off State
TEC reaches 255: the node is BUS OFF
in order to control the device. Structure of the Byte: ADR
(3 bits) + R/W (1bit) + DATA (4 bits). MSB is sent first. Refer
to MC33989 specifications for more details.
128 occurrences of 11 recessive bits
Analog Integrated Circuit Device Data
Freescale Semiconductor
BUS OFF is recover

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