DS90CF388AVJDX/NOPB National Semiconductor, DS90CF388AVJDX/NOPB Datasheet - Page 10

• Manufacturer Part Number: DS90CF388AVJDX/NOPB
• Description: IC DUAL PIX LDI 3.3V 100-TQFP
• Manufacturer: National Semiconductor

Specifications of DS90CF388AVJDX/NOPB

• Applications: Displays
• Interface: LVDS
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 100-TQFP, 100-VQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DS90CF388AVJDX

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AC Timing Diagrams
C — Setup and Hold Time (Internal data sampling window) defined by RSPOS (receiver input strobe position) min and max
TPPOS — Transmitter output pulse position (min and max)
RSKM ≥ Cable Skew (type, length) + LVDS Source Clock Jitter (cycle to cycle) + ISI (Inter-symbol interference)
See Applications Informations section for more details.
j
j
j
Cable Skew — typically 10 ps to 40 ps per foot, media dependent
TJCC — Cycle-to-cycle LVDS Output jitter (TJCC) is less than 100 ps (worse case estimate).
ISI is dependent on interconnect length; may be zero
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FIGURE 10. Transmitter Power Down Delay
FIGURE 11. Receiver Power Down Delay
FIGURE 12. Receiver Skew Margin
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