SEH01G72A1BH1MT-30R Swissbit NA Inc, SEH01G72A1BH1MT-30R Datasheet - Page 11

• Manufacturer Part Number: SEH01G72A1BH1MT-30R
• Description: DRAM DDR2 VLP 1GB 244-MINI DIMM
• Manufacturer: Swissbit NA Inc
• Series: -r

Specifications of SEH01G72A1BH1MT-30R

• Memory Type: DDR2 SDRAM
• Memory Size: 1GB
• Speed: 667MHz
• Features: -
• Package / Case: 244-MDIMM
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 1052-1045

DDR2 SDRAM COMPONENT ELECTRICAL CHARACTERISTICS AND RECOMMENDED
AC OPERATING CONDITIONS (Continued)
(0° C ≤ T
AC CHARACTERISTICS
ODT power-down exit latency
ODT enable from MRS
command
Exit active power-down to READ
command, MR [bit 12 = 0]
Exit active power-down to READ
command, MR [bit 12 = 1]
Exit precharge power-down to
any non-READ command
CKE minimum high/low time
Register Specifications
Parameter
DC high-level
input voltage
DC low-level
input voltage
AC high-level
input voltage
AC low-level
input voltage
Output high voltage
Output low voltage
Input current
Static standby
Static operating
Dynamic operating
(clock tree)
Dynamic operating
(per each input)
Input capacitance
(per device, per pin)
Input capacitance
(per device, per pin)
Notes: 1. Timing and switching specifications for the register listed above are critical for proper operation of the DDR2
Swissbit AG
Industriestrasse 4 – 8
CH – 9552 Bronschhofen
PARAMETER
CASE
SDRAM registered DIMMs. These are meant to be a subset of the parameters for the specific device used on the
module. Detailed information for this register is available in JEDEC standard JESD82.
≤ + 85° C; V
DD
Q = +1.8V ± 0.1V, V
Symbol Pins
V
V
V
V
V
V
I
I
I
I
I
C
C
I
DD
DD
DDD
DDD
IH
IL
IH
IL
OH
OL
I
I
(
(
(
(
DC
AC
DC
AC
SYMBOL
t
T
t
t
t
t
AXPD
XARD
XARDS
XP
CKE
)
)
)
)
MOD
Fon: [phone]
Fax: [phone]
Address,
control,
command
Address,
control,
command
Address,
control,
command
Address,
control,
command
Parity
output
Parity
output
All pins
All pins
All pins
n/a
n/a
Data
RESET#
DD
7 - AL
MIN
= +1.8V ± 0.1V)
12
8
2
2
3
5300-555
RESET# = V
V
RESET# = V
V
switching 50% duty cycle;
One data input switching at
Data Sheet
IL
IL
(
(
switching 50% duty cycle
RESET# = V
AC
AC
V
t
CK/2
), I
), I
V
V
V
I
MAX
RESET# = V
= V
I
I
I
O
O
= V
= V
= V
V
Conditions
, 50% duty cycle
= 0; CK and CK#
= 0; CK and CK#
IH
DD
LVCMOS
LVCMOS
SSTL_18
SSTL_18
SSTL_18
SSTL_18
DD
DD
REF
(
DD
DD
I
AC
Q = 1.8V
O
Q or V
Q or V
, V
, V
= 0
) or V
SS
±250mV;
Unit
t
t
t
t
t
ns
CK
CK
CK
CK
CK
I
I
Q (I
= V
= V
SS
www.swissbit.com
eMail: [e-mail]
SS
SS
IL
Q;
O
IH
IH
(
Q
DC
Q
= 0)
(
(
AC
AC
)
) or
) or
Min
V
V
REF
REF
125
250
1.2
2.5
-5
0
0
(
(
-
-
-
-
-
-
DC
DC
Rev.1.2
) +
) +
V
V
Max
manufacturer
manufacturer
manufacturer
V
REF
REF
Varies by
Varies by
Varies by
DD
(
(
Q + 250
V
100
0.5
3.5
DC
DC
+5
40
DD
-
) - 125
) - 250
10.06.2010
Units
Page 11
mV
mV
mV
mV
mA
µA
µA
µA
µA
pF
pF
V
V
of 14