SY10E445JC Micrel Inc, SY10E445JC Datasheet - Page 5

• Manufacturer Part Number: SY10E445JC
• Description: IC CONV 4-BIT SER/PAR 28-PLCC
• Manufacturer: Micrel Inc

Specifications of SY10E445JC

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 28-LCC (J-Lead)
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Micrel, Inc.
converters.
E446 devices to provide both transmission and receiving
of a high-speed serial data path. The E445, under special
input conditions, can convert up to a 2.5Gb/s NRZ data
stream into 4-bit parallel data. The device also provides
a divide-by-four clock output to be used to synchronize
the parallel data with the rest of the system.
provide test loop capability when used in conjunction
with the E446.
architecture. The architecture allows for the electrical
testing of the link without requiring actual transmission
over the serial data path medium. The SINA serial input
of the E445 has an extra buffer delay and, thus, should
be used as the loop back serial input.
divide-by-8 clock output to facilitate the cascading of two
devices to build a 1:8 demultiplexer. Figure 2 illustrates
the architecture of a 1:8 demultiplexer using two E445s.
The timing diagram for this configuration can be found
on the following page. Notice the serial outputs (S
of the lower order converter feed the serial inputs of the
higher order device. This feedthrough of the serial inputs
bounds the upper end of the frequency of operation. The
clock-to-serial output propagation delay, plus the set-up
time of the serial input pins, must fit into a single clock
period for the cascade architecture to function properly.
Using the worst case values for these two parameters
from the data sheet, t
clock frequency of 950MHz.
a single converter.
games can be played with the clock input of the higher
order E445. By delaying the clock feeding the second
E445 relative to the clock of the first E445, the frequency
of operation can be increased. The delay between the
two clocks can be increased until the minimum delay of
M9999-032206
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LOGIC DIAGRAM
APPLICATIONS INFORMATION
The SY10/100E are integrated 1:4 serial-to-parallel
The E445 features multiplexed dual serial inputs to
The E445 features a differential serial output and a
The clock frequency is significantly lower than that of
Parallel
Parallel
Data
Data
The chips are designed to work with the
Figure 1. Loop Test Architecture
Figure 1 illustrates the loop test
To increase this frequency, some
SOUT
SOUT
SINA
SINA
SINB
SINB
PD
CLK to S
OUT
= 1150ps or a
To Serial
Medium
From Serial
Medium
OUT
)
5
clock-to-serial-out would potentially cause a serial bit to
be swallowed (Figure 3). With a minimum delay of 800ps
on this output, the clock for the lower order E445 cannot
be delayed more than 800ps relative to the clock of the
first E445 without potentially missing a bit of information.
Because the set-up time on the serial input pin is
negative, coincident excursions on the data and clock
inputs of the E445 will result in correct operation.
relative to the first is to take advantage of the differential
clock inputs of the E445. By connecting the clock for the
second E445 to the complimentary clock input pin, the
device will clock a half a clock period after the first E445
(Figure 4). Utilizing this simple technique will raise the
potential conversion frequency up to 1.5GHz. The divide-
by-eight clock of the second E445 should be used to
synchronize the parallel data to the rest of the system as
the parallel data of the two E445s will no longer be
synchronized. This skew problem between the outputs
can be worked around as the parallel information will be
static for eight more clock pulses.
Perhaps the easiest way to delay the second clock
Serial Input
Tpd CLK
to SOUT
Tpd CLK
to SOUT
Clock a
Clock b
Clock
Figure 2. Cascaded 1:8 Converter Architecture
Clock
Clock
Data
Figure 3. Cascade Frequency Limitation
Parallel Output Data
SIN
SIN
Q
Q
3
7
800ps
800ps
Q
Q
E445a
2
6
Q
Q
SOUT
SOUT
1
5
1050ps
1050ps
Q
Q
0
4
100ps
SIN
SIN
Q
Q
3
3
Q
Q
E445b
2
2
Q
Q
SY100E445
1
1
SY10E445
Q
Q
0
0