W83627EG Nuvoton Technology Corporation of America, W83627EG Datasheet - Page 71

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W83627EG

Manufacturer Part Number
W83627EG
Description
IC I/O CONTROLLER 128-QFP
Manufacturer
Nuvoton Technology Corporation of America
Datasheets

Specifications of W83627EG

Applications
PC's, PDA's
Interface
LPC
Voltage - Supply
3.3V
Package / Case
128-XFQFN
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
W83627EG
Manufacturer:
Nuvoton Technology Corporation of America
Quantity:
10 000
6.8.39 Fan Divisor Register I - Index 47h (Bank 0)
Register Location:
Power on Default Value:
Attribute:
Size:
Bit 7-6: CPUFANIN0 Divisor bit1:0.
Bit 5-4: SYSFANIN Divisor bit1:0.
Bit 3: CPUFANIN1 output value if bit 0 sets to 0. Write 1, pin119(CPUFANIN1) always generates a
Bit 2: CPUFANIN1 Input Control. Set to 1, pin119 (CPUFANIN1) acts as FAN tachometer input, which
Bit 1: AUXFANIN1 output value if bit 0 sets to 0. Write 1, pin58(AUXFANIN1) always generates a logic
Bit 0: AUXFANIN1 Input Control. Set to 1, pin58 (AUXFANIN1) acts as FAN tachometer input, which is
Note : Please refer to Bank0 Index 5Dh , Fan divisor table.
6.8.40 Serial Bus Address Register - Index 48h (Bank 0)
Register Location:
Power on Default Value:
Attribute:
Size:
Bit 7: Reserved (Read Only).
Bit 6-0: Serial Bus address <7:1>.
logic high signal. Write 0, pin119 always generates a logic low signal. This bit is default 0.
is default value. Set to 0, this pin119 acts as FAN control signal and the output value of FAN
control is set by this register bit 1.
high signal. Write 0, pin58 always generates a logic low signal. This bit is default 0.
default value. Set to 0, this pin58 acts as FAN control signal and the output value of FAN
control is set by this register bit 1.
7
7
6
6
47h
55h
Read/Write
8 bits
48h
2Dh
Read/Write
8 bits
5
5
4
4
3
W83627EHF/EF, W83627EHG/EG
3
2
2
1
1
- 65 -
0
0
Reserved
FANINC5
FANOPV5
FANINC4
FANOPV4
SYSFANIN DIV_B0
SYSFANIN DIV_B1
CPUFANIN0 DIV_B0
CPUFANIN0 DIV_B1
Serial Bus Addr.
Publication Release Date: Nov. 2006
Revision 1.3

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