SCANPSC110FLMQB National Semiconductor, SCANPSC110FLMQB Datasheet
SCANPSC110FLMQB
Specifications of SCANPSC110FLMQB
Q1160538
Related parts for SCANPSC110FLMQB
SCANPSC110FLMQB Summary of contents
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... Connection Diagrams 28-Pin Flatpak TRI-STATE ® registered trademark of National Semiconductor Corporation. © 2009 National Semiconductor Corporation 100327 Version 5 Revision 1 SCANPSC110F Features ■ True IEEE1149.1 hierarchical and multidrop addressable capability ■ ...
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... Ordering Information SCANPSC110FFMQB SCANPSC110FLMQB Pin Descriptions TCK TMS TDI TDO TRST S OE TCK TMS TDI TDO www.national.com Order Number Description Military Flatpak Military Leadless Chip Carrier Pin Description Names Backplane Test Clock Input B Backplane Test Mode Select Input B Backplane Test Data Input ...
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Table of Contents 1. GLOSSARY OF TERMS DETAILED PIN DESCRIPTION TABLE OVERVIEW OF SCAN BRIDGE FUNCTIONS SCANPSC110F Bridge Architecture SCANPSC110F Bridge State Machines TESTER/SCANPSC110F BRIDGE INTERFACE REGISTER SET: ...
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Name I/O (Note 1) TMS TTL Input w/Pull-Up B Resistor TDI TTL Input w/Pull-Up B Resistor TDO TRI-STATEable mA/64 mA Drive, Reduced-Swing, Output TCK TTL Schmitt Trigger Input B TRST TTL Input w/Pull-Up Resistor S TTL Inputs (0–5) ...
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Overview of SCANPSC110F Bridge Functions SCANPSC110F BRIDGE ARCHITECTURE Figure 1 shows the basic architecture of the 'PSC110F. The device's major functional blocks are illustrated here. The TAP Controller, a 16-state state machine, is the central control for the device. The ...
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The 'PSC110F contains three distinct but coupled state-ma- chines (see Figure 2 ). The first of these is the TAP-control state-machine, which is used to drive the 'PSC110Fs scan ports in conformance with the 1149.1 Standard (see 19 of appendix). ...
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FIGURE 4. Local SCANPSC110F Bridge Port Configuration State Machine The 'PSC110F's scan port-configuration state-machine is used to control the insertion of local scan ports into the overall scan chain, or the isolation of local ports from the chain. From the ...
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FIGURE 5. Relationship Between SCANPSC110F Bridge State Machines Following a hardware reset, the TAP controller state-machine is in the Test-Logic-Reset (TLR) state; the 'PSC110F-selec- tion state-machine is in the Wait-For-Address state; and each Tester/SCANPSC110F Bridge Interface An IEEE 1149.1 system ...
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Register Set The SCANPSC110F Bridge includes a number of registers which are used for 'PSC110F selection and configuration, scan data manipulation, and scan-support operations. These registers can be grouped as shown in The specific fields and functions of each of ...
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Address Types Direct Address Broadcast Address Multi-Cast Group 0 Multi-Cast Group 1 Multi-Cast Group 2 Multi-Cast Group 3 Note 2: Hex address '7X', 'BX', or 'FX' may be used instead of '3X'. Note 3: Only the six (6) LSB's of ...
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FIGURE 7. Broadcast Addressing: Address Loaded into Instruction Register FIGURE 8. Multi-Cast Addressing: Address Loaded into Instruction Register Level 2 Protocol Once the SCANPSC110F Bridge has been successfully ad- dressed and selected, its internal registers may be accessed via Level-2 ...
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SAMPLE/PRELOAD, EXTEST, IDCODE, MODESEL, MCGRSEL, LFSRSEL, CNTRSEL). 2. Instructions that configure local ports or control the operation of the linear feedback shift register and counter registers (UNPARK, PARKTRL, PARKRTI, PARKPAUSE, GOTOWAIT, SOFTRESET, LFSRON, LFSROFF, CNTRON, CNTROFF). These instructions, ...
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When the 'PSC110F TAP Controller is in the Exit1-DR or Exit1-IRstate and TMS is high, the LSP controller forces a B constant logic “0” onto TMS thereby parking the port in the L Pause-DR or Pause-IR state respectively (see Another ...
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FIGURE 10. Local Scan Port Synchronization from Parked-RTI State Register Descriptions Instruction Register The instruction shift register is an 8-bit register that is in series with the scan chain whenever the TAP Controller of the SCANPSC110F Bridge is in the ...
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Mode Register XXX0X000 XXX0X001 XXX0X010 XXX0X011 XXX0X100 XXX0X101 XXX0X110 XXX0X111 XXX1XXXX X = don't care Register = 'PSC110F instruction register or any of the 'PSC110F test data registers PAD = insertion of a 1-bit register for synchronization Mode Register The ...
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Special Features BIST SUPPORT The sequence of instructions to run BIST testing on a parked SCANPSC110F Bridge port is as follows: 1. Pre-load the Boundary register of the device under test if needed. 2. Initialize the TCK counter to 00000000 ...
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Either one, some, or all of the local ports can be accessed simultaneously. Configuring the LSPN is accomplished with the mode register, in con- junction with the UNPARK instruction. The LSPN can be unparked in ...
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... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( Input Diode Current ( −0. +0. Input Voltage ( Output Diode Current ( −0. +0. Output Voltage ( Output Source/Sink Current ( Ground Current CC per Output Pin ...
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Symbol Parameter I (OE, Maximum Input IN TCK , S ) Leakage Current B (0–5) I Maximum Input IN, MAX (TRST, TDI , Leakage Current Ln TDI , TMS ) Maximum Input IN, MAX (TRST, TDI , ...
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AC Electrical Characteristics Symbol Parameter t , Propagation Delay PHL t TCK to TCK PLH B Ln TCK to TCK Propagation Delay PHL t TCK to TDO PLH B Ln TCK to TDO ...
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Symbol Parameter t , Disable Time PLZ t TRST to TDO PHZ Ln AC Electrical Characteristics Symbol Parameter t Setup Time S TMS to TCK Hold Time H TMS to TCK Setup Time S ...
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Symbol Parameter t Recover Time REC TCK from TRST Output-to-Output Skew OSHL t TCK OSLH Output-to-Output Skew OSHL t TMS (unparked) OSLH Ln F Maximum Clock Frequency MAX Note 8: Skew is defined as ...
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Note A: V and V are measured with respect to ground reference. OHV OLP Note B: Input pulses have the following characteristics MHz, t FIGURE 14. Quiet Output Noise Voltage Waveform 100327 Version 5 Revision 1 ≤ ...
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Applications Example FIGURE 17. Boundary Scan Backplane with 10 Card Slots, 8 Slots Are Filled with Boards The following sequence gives an example of how one might use the SCANPSC110F Bridge to perform 1149.1 operations via a multi-drop scan backplane. ...
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Components that do not support IDCODE will insert their bypass register into the active scan chain. After the IDCODE register scan, the GOTOWAIT instruction is issued to reset the local scan ports and return the 'PSC110F Selection controller to the ...
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Version 5 Revision 1 Print Date/Time: 2009/11/24 00:03:37 ...
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Appendix Note: The value of the TMS during the rising edge of TCK is located next to each transition. FIGURE 19. IEEE 1149.1 TAP Controller State Diagram 100327 Version 5 Revision 1 27 Print Date/Time: 2009/11/24 00:03:37 10032717 www.national.com ...
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Physical Dimensions www.national.com inches (millimeters) unless otherwise noted 28-Pin Leadless Chip Carrier (LCC) NS Package Number E28A 28-Pin Flatpak NS Package Number WA28D 28 100327 Version 5 Revision 1 Print Date/Time: 2009/11/24 00:03:37 ...
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Notes 29 100327 Version 5 Revision 1 Print Date/Time: 2009/11/24 00:03:37 www.national.com ...
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