ADM1025ARQ-REEL ON Semiconductor, ADM1025ARQ-REEL Datasheet - Page 11

• Manufacturer Part Number: ADM1025ARQ-REEL
• Description: IC MONITOR SYS/VOLT 5CH 16QSOP
• Manufacturer: ON Semiconductor

Specifications of ADM1025ARQ-REEL

• Rohs Status: RoHS non-compliant
• Applications: PC's, PDA's
• Interface: I²C
• Voltage - Supply: 3 V ~ 5.5 V
• Package / Case: 16-QSOP
• Mounting Type: Surface Mount

Because the measurement technique uses switched current
sources, excessive cable and/or filter capacitance can affect the
measurement. When using long cables, the filter capacitor may
be reduced or removed.
Cable resistance can also introduce errors. 1 Ω series resistance
introduces about 0.5°C error.
LIMIT VALUES
High and low limit values for each measurement channel are
stored in the appropriate limit registers. As each channel is
measured, the measured value is stored and compared with the
programmed limit.
STATUS REGISTERS
The results of limit comparisons are stored in Status Registers 1
and 2. The Status Register bit for a particular measurement
channel reflects the status of the last measurement and limit
comparison on that channel. If a measurement is within limits,
the corresponding Status Register bit will be cleared to “0.” If the
measurement is out of limits, the corresponding status register
bit will be set to “1.”
The state of the various measurement channels may be polled
by reading the Status Registers over the serial bus. Reading the
Status Registers does not affect their contents. Out-of-limit
temperature/voltage events may also be used to generate an
interrupt so that remedial action, such as turning on a cooling
fan, may be taken immediately. This is described in the section
on RST and INT.
MONITORING CYCLE TIME
The monitoring cycle begins when a 1 is written to the Start Bit
(Bit 0) of the Configuration Register. The ADC measures each
analog input in turn and as each measurement is completed the
result is automatically stored in the appropriate value register. This
“round-robin” monitoring cycle continues until it is disabled by
writing a 0 to Bit 0 of the Configuration Register.
REV. C
4. Try to minimize the number of copper/solder joints, which
5. Place 0.1 µF bypass and 1 nF input filter capacitors close to
6. If the distance to the remote sensor is more than eight inches,
7. For really long distances (up to 100 feet) use shielded twisted
can cause thermocouple effects. Where copper/solder joints
are used, make sure that they are in both the D+ and D–
path and at the same temperature.
Thermocouple effects should not be a major problem as 1°C
corresponds to about 240 µV, and thermocouple voltages are
about 3 µV/
thermocouples with a big temperature differential between
them, thermocouple voltages should be much less than 200 µV.
the ADM1025/ADM1025A.
the use of twisted pair cable is recommended. This will work
up to about 6 to 12 feet.
pair, such as Belden #8451 microphone cable. Connect the
twisted pair to D+ and D– and the shield to GND close to
the ADM1025/ADM1025A. Leave the remote end of the
shield unconnected to avoid ground loops.
o
C of temperature difference. Unless there are two
–11–
As the ADC will normally be left to free-run in this manner, the
time taken to monitor all the analog inputs will normally not be
of interest, since the most recently measured value of any input
can be read out at any time.
INPUT SAFETY
Scaling of the analog inputs is performed on-chip, so external
attenuators are normally not required. However, since the power
supply voltages will appear directly at the pins, it is advisable to
add small external resistors in series with the supply traces to the
chip to prevent damaging the traces or power supplies should
an accidental short such as a probe connect two power
supplies together.
As the resistors will form part of the input attenuators, they will
affect the accuracy of the analog measurement if their value is
too high. The analog input channels are calibrated assuming an
external series resistor of 500 Ω, and the accuracy will remain
within specification for any value from zero to 1 kΩ, so a standard
510 Ω resistor is suitable.
The worst such accident would be connecting 0 V to 12 V—a
total of 12 V difference. With the series resistors, this would draw
a maximum current of approximately 12 mA.
LAYOUT AND GROUNDING
Analog inputs will provide best accuracy when referred to a clean
ground. A separate, low impedance ground plane for analog
ground, which provides a ground point for the voltage dividers
and analog components, will provide best performance but is
not mandatory.
The power supply bypass, the parallel combination of 10 µF
(electrolytic or tantalum) and 0.1 µF (ceramic) bypass capacitors
connected between Pin 9 and ground, should also be located as
close as possible to the ADM1025/ADM1025A.
RST/INT OUTPUT
As previously mentioned, Pin 16 is a multifunction pin. Its state
after power-on is latched to set the lowest two bits of the serial bus
address. During NAND tree board-level connectivity testing, it
functions as the output of the NAND tree. It may also be used
as a reset output, or as an interrupt output for out-of-limit
temperature/voltage events.
Pin 16 is programmed as a reset output by clearing Bit 0 of the
Test Register and setting Bit 7 of the VID Register. A low going,
20 ms, reset output pulse can then be generated by setting Bit 4
of the Configuration Register.
If Bit 7 of the VID Register is cleared, Pin 16 can be programmed
as an interrupt output for out-of-limit temperature/voltage events
(INT). Desired interrupt operation is achieved by changing the
values of Bits 1 and 0 of the Test Register as shown in Table IV.
Note, however, that Bits 2 to 7 of the Test Register must be
zeros (not don’t cares). If, for example, INT is programmed for
thermal and voltage interrupts, then if any temperature or voltage
measurement goes outside its respective high or low limit, the
INT output will go low. It will remain low until Status Register 1
is read, when it will be cleared. If the temperature or voltage
remains out of limit, INT will be reasserted on the next monitoring
cycle. INT can also be cleared by issuing an Alert Response
Address Call.
ADM1025/ADM1025A