DC1041A-B Linear Technology, DC1041A-B Datasheet - Page 19

• Manufacturer Part Number: DC1041A-B
• Description: BOARD DEMO LTM4601HV
• Manufacturer: Linear Technology
• Series: µModuler

Specifications of DC1041A-B

• Design Resources: LTM4601HV Spice Model LTM4601 Gerber Files DC1041 Design File DC1041 Schematic
• Main Purpose: DC/DC, Step Down
• Outputs And Type: 1, Non-Isolated
• Power - Output: -
• Voltage - Output: 0.6V, 1.2V, 1.5V, 1.8V, 2.5V, 3.3V, or 5V
• Current - Output: 12A
• Voltage - Input: 4.5 ~ 28 V
• Regulator Topology: Buck
• Frequency - Switching: 800kHz
• Board Type: Fully Populated
• Utilized Ic / Part: LTM4601HV
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

APPLICATIONS INFORMATION
to 25°C inside the μModule with a thermal resistance θ
from junction to case between 6°C/W to 9°C/W. This will
maintain the maximum junction temperature inside the
μModule below 125°C.
Safety Considerations
The LTM4601HV modules do not provide isolation from
V
slow blow fuse with a rating twice the maximum input
current needs to be provided to protect each unit from
catastrophic failure.
Layout Checklist/Example
The high integration of LTM4601HV makes the PCB board
layout very simple and easy. However, to optimize its electri-
cal and thermal performance, some layout considerations
are still necessary.
• Use large PCB copper areas for high current path, in-
IN
cluding V
PCB conduction loss and thermal stress.
to V
OUT
IN
. There is no internal fuse. If required, a
, PGND and V
OUT
. It helps to minimize the
V
GND
V
OUT
IN
C
OUT
C
IN
Figure 17. Recommended Layout
C
OUT
C
IN
JC
• Place high frequency ceramic input and output capaci-
• Place a dedicated power ground layer underneath the
• To minimize the via conduction loss and reduce module
• Do not put vias directly on pads unless they are
• Use a separated SGND ground copper area for com-
Figure 17 gives a good example of the recommended
layout.
tors next to the V
high frequency noise.
unit. Refer frequency synchronization source to power
ground.
thermal stress, use multiple vias for interconnection
between top layer and other power layers.
capped.
ponents connected to signal pins. Connect the SGND
to PGND underneath the unit.
4601HV F17
IN
SIGNAL
GND
, PGND and V
LTM4601HV
OUT
pins to minimize
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