ATA557001C-DDT Atmel, ATA557001C-DDT Datasheet - Page 10

• Manufacturer Part Number: ATA557001C-DDT
• Description: IC IDIC SENSOR RW 1KBIT UFBGA
• Manufacturer: Atmel
• Series: -r

Specifications of ATA557001C-DDT

• Function: Read/Write
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.8
Figure 4-5.
10
Write-data Protocol
POR
Atmel ATA5570C
Block 0 loading
Complete Writing Sequence
Table 4-1.
The Atmel
command sequence. There are three valid opcodes:
Writing has to follow these rules:
Note:
If the transmitted command sequence is invalid, the Atmel ATA5570C enters regular-read
mode with the previously selected page (by former opcode “10” or “11”).
Parameters
Start gap
Write gap
Write data in normal mode
• The opcodes “10” and “11” precede all block-write and direct-access operations for page 0
• The RESET opcode “00” initiates a POR cycle
• The opcode “01” precedes all test-mode write operations. Any test-mode access is ignored
• Standard write needs the opcode, the lock bit, 32 data bits and the 3-bit address
• Protected write (PWD bit set) requires a valid 32-bit password after opcode and before data
• For the AOR wake-up command an opcode and a valid password are necessary to select
Read mode
and page 1
after the master key (bits 1 to 4) in block 0 has been set to “6”. Any further modifications of
the master key are prohibited by setting the lock bit of block 0 or the OTP bit.
(38bits total)
and address bits
and activate a specific tag
Start gap
The data bits are read in the same order as written.
®
ATA5570C expects to receive a dual-bit opcode as the first two bits of a reader
Op-code
Write-data Decoding Scheme
Lock bit
Normal write mode
Block data
Remark
“0” data
“1” data
–
Write mode
Block address
Symbol
Wgap
Sgap
d0
d1
Programming
Min
10
16
48
8
Read mode
Max
50
30
31
63
9191B–RFID–05/11
Unit
FC
FC
FC
FC