AD8362-EVALZ Analog Devices Inc, AD8362-EVALZ Datasheet
AD8362-EVALZ
Specifications of AD8362-EVALZ
Related parts for AD8362-EVALZ
AD8362-EVALZ Summary of contents
Page 1
... The corner frequency of the averaging filter can be lowered without limit by adding an external capacitor at the CLPF pin. The AD8362 can be used to determine the true power of a high frequency signal having a complex low frequency modulation envelope, or simply as a low frequency rms volt- meter ...
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... Changes to the Offset Elimination Section................................. 16 Changes to the Operation at Low Frequencies Section ............ 17 Changes to the Time-Domain Response of the Closed Loop Section.................................................................................... 17 Changes to Equation 13................................................................. 24 Changes to Table 5 ......................................................................... 31 6/03—Rev Rev. A Updated Ordering Guide .................................................................5 Change to Analysis Section........................................................... 12 Updated AD8362 Evaluation Board Section .............................. 26 2/03—Revision 0: Initial Version Rev Page ...
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... VTGT connected to VREF, VOUT tied to VSET, unless otherwise noted. ≥ 200 Ω to ground − 0 ≥ 200 Ω to ground = −52 dBm dBm IN / change S = open = open ≤ 100 kHz SPOT ≤ +85°C A Rev Page AD8362 Min Typ Max Unit 3.8 GHz 1 −52 dBm 8 dBm 1.12 mV rms 1.12 V rms 2 −40 ...
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... AD8362 Parameter Conditions RMS TARGET INTERFACE Pin VTGT Nominal Input Voltage Range Measurement range = 60 dB, to ±1 dB error Input Bias Current VTGT = 1.25 V VTGT = 0 V Incremental Input Resistance POWER-DOWN INTERFACE Pin PWDN Logic Level to Enable Logic low enables Logic Level to Disable Logic high disables ...
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... A IN < +85° −15 dBm A IN < +85° dBm < +85° −35 dBm A IN < +85° −15 dBm A IN < +85° +10 dBm A IN Rev Page AD8362 Min Typ Max Unit −5.3 dB −5.5 dB −4.8 dB 50.5 mV/dB −58 dBm 0.2 dB 0.2 dB 0.4 dB ...
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... AD8362 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltage VPOS Input Power (Into Input of Device) Equivalent Voltage Internal Power Dissipation θ JA Maximum Junction Temperature Operating Temperature Range Storage Temperature Range Lead Temperature (Soldering, 60 sec) Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device ...
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... Differential Signal Input Terminals. Input Impedance = 200 Ω. Can also be driven single-ended, in which case, the input impedance reduces to 100 Ω. 7 PWDN Disable/Enable Control Input. Apply logic high voltage to shut down the AD8362. 9 CLPF Connection for Ground Referenced Loop Filter Integration (Averaging) Capacitor. ...
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... AD8362 EQUIVALENT CIRCUITS VPOS DECL COMM INHI 100Ω VGA 100Ω INLO VPOS COMM DECL Figure 3. Circuit A VPOS ~35kΩ VSET VSET ~35kΩ INTERFACE ACOM COMM Figure 4. Circuit B VPOS 50kΩ VTGT VTGT 50kΩ INTERFACE GAIN = 0.12 ACOM COMM Figure 5 ...
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... CW 3.0 2.5 IS95 REVERSE LINK W-CDMA 8-CHANNEL 2.0 W-CDMA 15-CHANNEL 1.5 1.0 0.5 0 –10 –60 –55 –50 –45 –40 –35 –30 –25 –20 –15 –5 INPUT AMPLITUDE (dBm) AD8362 3.0 2.4 1.8 1.2 0.6 0 –0.6 –1.2 –1.8 –2.4 –3 3.0 2.4 1 ...
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... AD8362 3.0 2.5 2.0 1.5 1.0 IS95 REVERSE LINK 0 –0.5 –1.0 W-CDMA 15-CHANNEL –1.5 –2.0 –2.5 –3.0 –60 –55 –50 –45 –40 –35 –30 –25 –20 –15 INPUT AMPLITUDE (dBm) Figure 14. Output Error from CW Linear Reference vs. Input Amplitude with Different Waveforms, CW, IS95 Reverse Link, W-CDMA 8-Channel, W-CDMA 15-Channel, Frequency 900 MHz ...
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... INPUT AMPLITUDE (dBm) –50 –40 –30 –20 – INPUT AMPLITUDE (dBm) –50 –40 –30 –20 – INPUT AMPLITUDE (dBm) AD8362 –2 –4 –6 – +85°C +25°C –40° –2 –4 –6 – ...
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... AD8362 52.0 51.5 51.0 50.5 50.0 49.5 49.0 FREQUENCY (MHz) Figure 26. Logarithmic Slope vs. Frequency, Temperatures: −40°C, +25°C, and +85°C –53 –54 –55 –56 –57 –58 –59 –60 –61 –62 –63 FREQUENCY (MHz) Figure 27. Logarithmic Intercept vs. Frequency, Temperatures: −40°C, +25°C, and +85°C 3 ...
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... Rev Page –10dBm –20dBm –30dBm TIME (ms) Levels, Carrier Frequency 900 MHz, CLPF = 0.1 μF VPOS –10dBm –20dBm –30dBm TIME (ms) Levels, Carrier Frequency 900 MHz, CLPF = 0 100MHz 3GHz AD8362 –2 –4 –6 –8 –10 –12 – –2 –4 –6 –8 –10 –12 – ...
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... AD8362 5 0 –5 –10 –15 –20 –25 –30 –40 –30 –20 – TEMPERATURE (°C) Figure 38. Change in VREF vs. Temperature, 3 Sigma to Either Side of Mean 300 250 200 150 100 1.230 Rev Page 1.235 1.240 1.245 1.250 1.255 1.260 1.265 VREF (V) Figure 39. VREF Distribution ...
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... CHARACTERIZATION SETUP EQUIPMENT The general hardware configuration used for most of the AD8362 characterization is shown in Figure 40. The signal source is a Rohde & Schwarz SMIQ03B. A 1:4 balun transformer is used to transform the single-ended RF signal to differential form. For frequencies above 3.0 GHz, an Agilent 8521A signal source was used ...
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... This unique combination allows the AD8362 to be used as a calibrated RF wattmeter covering a power ratio of >1,000,000:1, a power controller in closed-loop systems, a general-purpose rms-responding voltmeter, and in many other low frequency applications ...
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... VOUT cannot run fully down to ground; here the extrapolated value. VOLTAGE VS. POWER CALIBRATION The AD8362 can be used as an accurate rms voltmeter from arbitrarily low frequencies to microwave frequencies. For low frequency operation, the input is usually specified either in volts rms or in dBV (decibels relative rms). ...
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... VGA is operating, and thus on the input signal amplitude. Baseline variations of this sort are a common aspect of all VGAs, but they are more evident in the AD8362 because of the method of its implementation, which causes the offsets to ripple along the gain axis with a period of 6.33 dB. When an exces- sively large value of CHPF is used, the offset correction process can lag the more rapid changes in the VGA’ ...
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... MHz), is realized only when the input is presented differential (balanced) form. In Figure 47, a transmission line balun is used at the input. Having a 1:4 impedance ratio (1:2 turns ratio), the 200 Ω differential input resistance of the AD8362 becomes 50 Ω at the input to the balun. AD8362 1:4 Z-RATIO COMM ...
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... VGA, a large capaci- tor must be connected between the CHPF pin and ground (see the Choosing a Value for CHPF section). More information on the operation of the AD8362 and other RF power detectors at low frequency is available in Application Note AN-691: Operation of RF Detector Products at Low Frequency. ...
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... A 10% to 90% step response to an input step is also listed. Where the increased response time is unacceptably high, CLPF must be reduced. If the output of the AD8362 is sampled by an ADC, averaging (13) in the digital domain can further reduce the residual noise. ...
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... In principle, this doubles the peak crest factor that can be handled by the system. Figure 53 and Figure 54 show the effect of varying VTGT on measurement accuracy when the AD8362 is swept with a series of signals with different crest factors, varying from CW with a crest factor W-CDMA carrier (Test Model 1-64) with a crest factor of 10 ...
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... VOUT (4.9 V with power supply). TEMPERATURE COMPENSATION AND REDUCTION OF TRANSFER FUNCTION RIPPLE The transfer function ripple and intercept drift of the AD8362 can be reduced using two techniques detailed in Figure 57. CLPF is reduced from its nominal value. For broadband- modulated input signals, this results in increased noise at the output that is fed back to the VSET pin ...
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... C Δ Temperatur e In this example, the drift of the AD8362 from 25°C to 85°C is −2.07 dB and the temperature delta is 60°C, which results in −0.0345 dB/°C drift. This temperature drift in dB/°C is con- verted to mV/°C through multiplication by the logarithmic slope (51 mV/dB at 2350 MHz). The result is −1.76 mV/°C. The following equation calculates the values of R1 and R2: ° ...
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... Figure 63. AD8362 VOUT and Error with Linear Temperature Compensation at 3650 MHz, Temperature Compensation is Optimized for 85°C 8 +85°C +25°C –40° –2 –4 –6 – Rev Page AD8362 8 +85°C +25° ...
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... To operate in controller mode, the link between VSET and VOUT is broken. A setpoint voltage is applied to the VSET input, while VOUT is connected to the gain control terminal of the VGA, and the AD8362 RF input is connected to the out- put of the VGA (generally using a directional coupler or power splitter and some additional attenuation). Based on the defined ...
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... V. VDBS is 40% of the output of the AD8362. Over the 3 V range from 0 3.5 V, the gain of the AD8330 varies by (0.4 × 3 V)/(30 mV/dB dB. Combined with the 65 dB gain span of the AD8362, this results in a 100 dB variation for change in VOUT ...
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... Position R17 and Position R9, and with SW2 switched to its alternate position. The AD8362 is powered up with SW3 in the position shown in Figure 67 and connector PWDN open. The part can be powered down by either connecting a logic high voltage to a connector, PWDN, with SW3 in the position switching SW3 to its alternate position ...
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... Figure 68. Component Side Metal of Evaluation Board Figure 69. Component Side Silkscreen of Evaluation Board Rev Page AD8362 ...
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... Not installed SW1 Use to reduce VTGT or to externally apply a voltage to VTGT SW2 Measurement mode/controller mode selector SW3 Power-down/power-up or external power-down selector Part Number ETC 1.6-4-2-3 (M/A-COM) AD8362ARU Rev Page Default Value 0.1 μF 100 0.1 μ open 1000 pF 100 pF 1000 pF LK1 = open 0 Ω ...
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... ORDERING GUIDE Model Temperature Range AD8362ARU −40°C to +85°C AD8362ARU-REEL −40°C to +85°C AD8362ARU-REEL7 −40°C to +85°C 1 AD8362ARUZ −40°C to +85°C 1 AD8362ARUZ-REEL7 −40°C to +85°C 1 AD8362-EVALZ RoHS Compliant Part. 5.10 5.00 4. 4.50 6.40 4.40 BSC 4. PIN 1 1 ...
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... AD8362 NOTES ©2003–2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D02923-0-6/07(D) Rev Page ...