LM88EVALA National Semiconductor, LM88EVALA Datasheet - Page 4

• Manufacturer Part Number: LM88EVALA
• Manufacturer: National Semiconductor

Specifications of LM88EVALA

• Lead Free Status / Rohs Status: Not Compliant

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LM88 Electrical Characteristics
Note 2: When the input voltage (V
maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 5mA to four.
Note 3: Parasitics or ESD protection circuitry are shown in the diagram found below. The ESD Clamp circtuitry is triggered on when there is an ESD event. The table
maps what devices appear on the different pins.
Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
ambient thermal resistance) and T
given in the Absolute Maximum Ratings, whichever is lower. For this device, T
package types when board mounted follow:
Note 5: The human body model is a 100pF capacitor discharged through a 1.5k resistor into each pin. The machine model is a 200pF capacitor discharged directly
into each pin.
Note 6: See the URL ”http://www.national.com/packaging/“ for other recomdations and methods of soldering surface mount devices.
Note 7: Typicals are at T
Note 8: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 9: These are sample temperature ranges, contact the factory for other temperature ranges. Performance is dependent on temperature range.
Note 10: The two I
current, 2µA (max). In Region 2, V
current flow is under short circuit conditions as specified at 40µA (max). Under normal operating conditions a pull-resistor (R) will be used. The voltage drop across
this pull-up resistor caused by the 2µA normal leakage current with large values of R (much greater than 100k) will bias diode D1 into the cutoff region causing the
additional current to be negligible in the voltage drop calculation. With low values of R more current will flow as in the case of a 1.1k pull-up, 20µA may flow causing
less than 22mV of voltage drop.
Pin Name
D0+
D−
D1+
O_CRIT
O_SP1
O_SP0
OH
specifications are intended to describe two operating regions of the output voltage. In Region 1, V
J
= T
A
= 25˚C and represent most likely parametric norm.
A
+
I
− 0.6V to V
) at any pin exceeds the power supply (V
(ambient temperature). The maximum allowable power dissipation at any temperature is P
+
, there is additional current flowing caused by the ESD protection circuitry (see Figure in Note 3). The maximum
D1
X
X
X
X
X
X
Package Type
MUA08A
D2
X
X
X
X
X
X
(Continued)
I
<
Jmax
4
GND or V
D3
X
X
X
X
X
X
= 125˚C. For this device the typical thermal resistance (
250˚C/W
I
>
JA
V
+
), the current at that pin should be limited to 5mA. The 20mA
D4
X
X
X
X
X
X
Jmax
(maximum junction temperature),
D5
X
+
− 0.6V and below, there is normal leakage
10132604
D
= (T
D6
X
X
X
Jmax
–T
A
)/
JA
JA
) of the different
50
50
50
JA
or the number
R1
0
0
0
(junction to