MAX4533CPP+ Maxim Integrated Products, MAX4533CPP+ Datasheet - Page 9

• Manufacturer Part Number: MAX4533CPP+
• Description: IC SWITCH QUAD SPDT 20DIP
• Manufacturer: Maxim Integrated Products

Specifications of MAX4533CPP+

• Function: Switch
• Circuit: 4 x SPDT
• On-state Resistance: 175 Ohm
• Voltage Supply Source: Single, Dual Supply
• Voltage - Supply, Single/dual (±): 9 V ~ 36 V, ±4.5 V ~ 18 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 20-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

During normal operation of a conducting channel, N1
and P1 remain on with a typical 125Ω on-resistance
between NO_ (or NC_) and COM_. If the input voltage
exceeds either supply rail by about 150mV, the parallel
combination switches (N1, P1) are forced off through
the driver and sensing circuitries. At the same time, the
output (COM_ ) is clamped to the appropriate supply
rail by the clamp circuitries (N2, P2). Two clamp circuits
limit the output voltage to the supply voltages.
For simplicity, Figure 1 shows only one side of the SPDT
switch configuration. The complete circuit is composed
of two channels with their outputs connected.
Two comparators continuously compare the voltage on
the NO_ (or NC_ ) pin with V+ and V- supply voltages.
When the signal on NO_ (or NC_ ) is between V+ and
V-, the switch behaves normally, with FETs N1 and P1
turning on and off in response to NO_ (or NC_) signals
(Figure 1). For any voltage between the supply rails,
the switch is bidirectional; therefore, COM_ and NC_
(or NO_ ) are interchangeable. Only NO_ and NC_ can
be exposed to overvoltages beyond the supply range
and within the specified breakdown limits of the device.
Figure 1. Simplified Internal Structure
NC_
NO_
or
INPUT
+15V
-15V
-15V
+15V
SWITCH
SWITCH
SENSE
SENSE
_______________________________________________________________________________________
N3
P3
COMPARATOR
COMPARATOR
P-CHANNEL
N-CHANNEL
DRIVER
DRIVER
N1
P1
Quad, Rail-to-Rail, Fault-Protected,
Normal Operation
+V(+15V)
-V(-15V)
CLAMP
CLAMP
N2
P2
OUTPUT COM_
The MAX4533 protects devices connected to its output
(COM_) through its unique fault-protection circuitry.
When the input voltage is raised above either supply
rail, the internal sense and comparator circuitries (N3
and N-channel driver or P3 and P-channel driver) dis-
connect the output (COM_) from the input (Figure 1).
If the switch driven above the supply rail has an on
state, the clamp circuitries (N2 or P2) connect the out-
put to the appropriate supply rail. Table 1 summarizes
the MAX4533’s operation under normal and fault condi-
tions. Row 5 shows a negative fault condition when the
supplies are on. It shows that with supplies of ±15V, if
the input voltage is between -15V and -25V, the output
(COM_) clamps to the negative supply rail of -15V.
With this technique, the SPDT switch is capable of with-
standing a worse-case condition of opposite fault polar-
ities at its inputs.
When a fast rising or falling transient on NO_ (or NC_)
exceeds V+ or V-, the output (COM_) follows the input
(IN_) to the supply rail by only a few nanoseconds. This
delay is due to the switch on-resistance and circuit
capacitance to ground. However, when the input tran-
sient returns to within the supply rails there is a longer
recovery time. For positive faults, the recovery time is
typically 2.5µs. For negative faults, the recovery time is
typically 1.3µs. These values depend on the COM_ out-
put resistance and capacitance. The delays are not
dependent on the fault amplitude. Higher COM_ output
resistance and capacitance increase the recovery
times.
The maximum fault voltage on the NO_ or NC_ pins is
±40V from ground when the power is off. With ±15V sup-
ply voltages, the highest voltage on NO_ (or NC_) can
be +25V, and the lowest voltage on NO_ (or NC_) can
be -25V. Exceeding these limits can damage the chip.
The logic-level thresholds are TTL/CMOS-compatible
when V+ is +15V. Raising V+ increases the threshold
slightly; when V+ reaches +25V, the level threshold is
2.8V—higher than the TTL output high-level minimum of
2.4V, but still compatible with CMOS outputs (see the
Typical Operating Characteristics).
Increasing V- has no effect on the logic-level thresh-
olds, but it does increase the gate-drive voltage to the
signal FETs, reducing their on-resistance.
Fault Protection, Voltage, and Power Off
SPDT Analog Switch
IN_ Logic-Level Thresholds
Transient Fault Condition
Fault Condition
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