AD8116JSTZ Analog Devices Inc, AD8116JSTZ Datasheet - Page 12

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AD8116JSTZ

Manufacturer Part Number
AD8116JSTZ
Description
IC VIDEO CROSSPOINT SWIT 128LQFP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD8116JSTZ

Function
Video Crosspoint Switch
Circuit
1 x 16:16
Voltage Supply Source
Dual Supply
Voltage - Supply, Single/dual (±)
±4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
128-LQFP
Crosspoint Switch Type
Analog
Control Interface
Serial
Supply Voltage Range
± 4.5V To ± 5.5V
Operating Temperature Range
0°C To +70°C
Digital Ic Case Style
LQFP
No. Of Pins
128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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AD8116
Creating Larger Crosspoint Arrays
The AD8116 is a high density building block for crosspoint
arrays over 256 × 256. Various features such as output disable,
chip enable, serial data out and multiple pinouts for logic signals
are very useful for the creation of these larger arrays.
The first consideration in constructing a larger crosspoint is to
determine the minimum number of devices that are required.
The 16 × 16 architecture of the AD8116 contains 256 “points,”
which is a factor of four greater than an 8 × 8 crosspoint and a
factor of 64 greater than a 4 × 1 crosspoint. The PC board area
and power consumption savings are readily apparent when
compared to using these smaller devices.
For a nonblocking crosspoint, the number of points required is
the product of the number of inputs multiplied by the number
of outputs. Nonblocking requires that the programming of a
given input to one or more outputs does not restrict the avail-
ability of that input to be a source for any other outputs.
Thus a 32 × 32 crosspoint will require 1024 points. This number is
then divided by 256, or the number of points in one AD8116
device, to yield four in this case. This says that the minimum
number of 16 × 16 devices required for a fully programmable
32 × 32 crosspoint is four.
Some nonblocking crosspoint architectures will require more
than this minimum as calculated above. Also, there are blocking
architectures that can be constructed with fewer devices than this
minimum. These systems have connectivity available on a statis-
tical basis that is determined when designing the overall system.
The basic concept in constructing larger crosspoint arrays is to
connect inputs in parallel in a horizontal direction and to “wire-
OR” the outputs together in the vertical direction. The meaning
of horizontal and vertical can best be understood by looking at a
diagram. Figure 6 illustrates this concept for a 32 × 32 crosspoint
array. A 48 × 48 crosspoint is illustrated in Figure 7.
The 32 × 32 crosspoint requires each input driver drive two inputs
in parallel and each output be wire-ORed with one other output.
The 48 × 48 crosspoint requires driving three inputs in parallel and
having the outputs wire-ORed in groups of three. It is required of
the system programming that only one output of a wired-OR node
be active at a time.
It is not essential that crosspoint architectures be square. For
example, a 64 × 16 crosspoint array can be constructed with
four AD8116s by driving each input with a separate signal
and wire-ORing together the corresponding outputs of each
device. It can be seen, however, that by going to larger arrays
the number of disabled outputs an active output has to drive
starts to increase.
At some point, the number of outputs that are wire-ORed becomes
too great to maintain system performance. This will vary according
to which system specifications are most important. For example, a
128 × 16 crosspoint can be created with eight AD8116s. This
design will have 128 separate inputs and have the corresponding
outputs of each device wire-ORed together in groups of eight.
Using additional crosspoint devices in the design can lower the
number of outputs that have to be wire-ORed together. Figure
26 shows a block diagram of a system using ten AD8116s to
create a nonblocking 128 × 16 crosspoint that restricts the wire-
ORing at the output to only four outputs. This will prevent an
enabled output from having to drive a large number of disabled
devices. Additionally, by using the lower eight outputs from
each of the two Rank 2 AD8116s, a blocking 128 × 32 crosspoint
array can be realized.
There are, however, some drawbacks to this technique. The
offset voltages of the various cascaded devices will accumulate
and the bandwidth limitations of the devices will compound. In
addition, the extra devices will consume more current and take
up more board space. Once again, the overall system design
specifications will determine how to make the various trade-offs.
IN
IN
IN
16–31
32–47
0–15
16
16
16
IN
IN
16–31
0–15
IN
IN
IN
AD8116
AD8116
AD8116
16
16
×
×
OUT
OUT
OUT
OUT 0–15
IN
IN
AD8116
AD8116
16
OUT
OUT
OUT 0–15
16
IN
IN
IN
AD8116
AD8116
AD8116
16–31
OUT
OUT
OUT
0–15
OUT 16–31
IN
IN
AD8116
AD8116
16
OUT
OUT
OUT 16–31
IN
IN
IN
AD8116
AD8116
AD8116
16
OUT
OUT
OUT
OUT 32–47
16

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