LFE3-35EA-8FN672I Lattice, LFE3-35EA-8FN672I Datasheet - Page 11

• Manufacturer Part Number: LFE3-35EA-8FN672I
• Description: IC FPGA 33.3K LUTS 310I/O FN672
• Manufacturer: Lattice
• Series: ECP3r

Specifications of LFE3-35EA-8FN672I

• Number Of Logic Elements/cells: 33000
• Number Of Labs/clbs: 4125
• Total Ram Bits: 1358848
• Number Of I /o: 310
• Number Of Gates: -
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 672-BBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 220-1163

IP Suites
Lattice IP suites provide many of the functions required to develop a total solution for common FPGA applications. In addition, multiple Lattice FPGA
families are supported with each IP suite, so designers can develop solutions across multiple Lattice families, taking advantage of the best features of
each. The following table summarizes which IP cores are included in each IP suite, and which FPGA families are supported.
IP Value Suite
System Design Suite
WiMAX Design Suite
DSP Design Suite
1 GbE Design Suite
10 GbE Design Suite
Scatter-Gather DMA Controller
Block Convolutional Encoder
Dynamic Block RS Decoder
Dynamic Block RS Encoder
Tri-Speed Ethernet MAC
Tri-Speed Ethernet MAC
PCI MT 32-bit/64-bit,
Block Viterbi Decoder
PCI T 32-bit/64-bit,
33 MHz/66 MHz
33 MHz/66 MHz
SGMII & GbE
FFT Compiler
FFT Compiler
FFT Compiler
FFT Compiler
10GbE MAC
FIR Filter
FIR Filter
PCIe x1
PCIe x4
IP Core
LPDDR
LPDDR
DA-FIR
SPI-4.2
DDR2
DDR3
DDR2
DDR3
DDR2
DDR3
DDR2
DDR3
DDR
DDR
NCO
DDR
DDR
CIC
ECP3
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
ECP2/M
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
ECP
EC/
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
SC/M
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
XP2
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
XO2
P
P
P
P
P
P
P
P
XO
P
P
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Suite
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Order #: DS-SYS-ST-UR1
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Order #: DS-DSP-ST-U1
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