LFXP3C-4QN208C Lattice, LFXP3C-4QN208C Datasheet - Page 306
![no-image](/images/manufacturer_photos/0/3/380/lattice_sml.jpg)
LFXP3C-4QN208C
Manufacturer Part Number
LFXP3C-4QN208C
Description
IC FPGA 3.1KLUTS 136I/O 208-PQFP
Manufacturer
Lattice
Datasheet
1.LFXP3C-3T100C.pdf
(397 pages)
Specifications of LFXP3C-4QN208C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFXP3C-4QN208C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
- Current page: 306 of 397
- Download datasheet (10Mb)
Lattice Semiconductor
Figure 13-3. Flash Programming Timing Diagram
Dual-Purpose sysCONFIG Pins
The following is a list of the dual-purpose sysCONFIG pins. These pins are available as general purpose I/O
(GPIO) after configuration. If a dual-purpose pin is to be used both for configuration and as a GPIO, the user must
adhere to the following:
• The I/O type must remain the same. For example, if the pin is a 3.3V CMOS pin (LVCMOS33) during configura-
• The user must select the correct CONFIG_MODE setting and set the PERSISTENT bit to OFF in order to use
• The user is responsible for insuring that no internal or external logic will interfere with device configuration.
Also, if slave parallel configuration mode is not being used then one or both of the parallel port chip selects (CSN,
CS1N) must be high or tri-stated during configuration.
After configuration, these pins, if not used as GPIO, are tri-stated and weakly pulled up.
DIN
DIN (data input) is a dual-purpose input with a weak pull-up. DIN is used for the serial bitstream configurations.
DOUT/CSON
The DOUT/CSON is a dual-purpose output that is used in Chain Mode (daisy chaining). This pin can be used in
serial or parallel modes and has two uses.
For serial and parallel configuration modes, when BYPASS Chain Mode is selected, this pin will become DOUT. In
a serial configuration mode, when the device becomes fully configured, a BYPASS instruction will be executed and
the data on DIN will be presented on the DOUT pin through a bypass register. In this way the serial data is passed
to the next device. In parallel configuration mode the data will be serialized and then presented on DOUT; D[0]
(MSb) will be shifted out first followed by D[1], D[2] and so on to D[7] (LSb).
For parallel configuration mode, when FLOW_THROUGH Chain Mode is selected, this pin will become Chip Select
Out (CSON). In FLOW_THROUGH Chain Mode, when the device is fully configured (the internal DONE bit goes
tion it must remain a 3.3V CMOS pin as GPIO.
the dual-purpose sysCONFIG pins as GPIO after configuration. These settings can be found in the ispLEVER
Design Planner (formerly called the Preference Editor).
PROGRAMN
WRITEN
D[0:7]
BUSY
CCLK
CS1N
INITN
CSN
LOW to select Direct Programming. High to select Background Programming.
13-7
LatticeXP sysCONFIG Usage Guide
Drive to LOW if error happens
FLASH to SRAM upload happens if DONE
fuse is programmed and CFG[1:0] are high.
Related parts for LFXP3C-4QN208C
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![LFXP3C-4TN144C](/photos/16/14/161488/tqfp-144_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 100 I/O 1.8/2.5/3.3V -4 Spd
Manufacturer:
Lattice
Datasheet:
![LFXP3C-4TN100C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 62 I/O 1.8/2.5/3.3V -4 Spd
Manufacturer:
Lattice
Datasheet:
![LFXP3C-4Q208C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 136 IO 1.8 /2.5/3.3V -4 Spd
Manufacturer:
Lattice
![LFXP3C-4T144I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 100 IO 1.8 /2.5/3.3V -4 Spd I
Manufacturer:
Lattice
![LFXP3C-4Q208I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 136 IO 1.8 /2.5/3.3V -4 Spd I
Manufacturer:
Lattice
![LFXP3C-3TN144C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTS 100 I/O
Manufacturer:
Lattice
Datasheet:
![LFXP3C-3QN208C](/photos/16/15/161504/qfp208_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTS 136 I/O
Manufacturer:
Lattice
Datasheet:
![LFXP3C-3TN100C](/photos/16/2/160258/tqfp-100_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTS 62 I/O
Manufacturer:
Lattice
Datasheet:
![LFXP3C-5TN100C](/photos/16/2/160258/tqfp-100_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTS 62 I/O
Manufacturer:
Lattice
Datasheet:
![LFXP3C-3TN100I](/photos/16/2/160258/tqfp-100_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 62 IO 1.8/ 2.5/3.3V -3 Spd I
Manufacturer:
Lattice
Datasheet:
![LFXP3C-3TN144I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 100 I/O 1.8/2.5/3.3V IND
Manufacturer:
Lattice
Datasheet:
![LFXP3C-5TN144C](/photos/19/4/190401/ge144tqfp05-40_tmb.jpg)
Part Number:
Description:
FPGA, 1.8V FLASH, INSTANT ON, SMD
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
![LFXP3C-3QN208I](/images/manufacturer_photos/0/3/381/lattice_semiconductor_tmb.jpg)
Part Number:
Description:
FPGA LatticeXP Family 3000 Cells 320MHz 130nm (CMOS) Technology 1.8V/2.5V/3.3V 208-Pin PQFP Tray
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
![LFXP3C-3T144I](/images/manufacturer_photos/0/3/381/lattice_semiconductor_tmb.jpg)
Part Number:
Description:
FPGA LatticeXP Family 3000 Cells 320MHz 130nm (CMOS) Technology 1.8V/2.5V/3.3V 144-Pin TQFP Tray
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
![LFXP3C-4T100I](/images/manufacturer_photos/0/3/381/lattice_semiconductor_tmb.jpg)
Part Number:
Description:
FPGA LatticeXP Family 3000 Cells 360MHz 130nm (CMOS) Technology 1.8V/2.5V/3.3V 100-Pin TQFP Tray
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet: