LFE2-6SE-6FN256C Lattice, LFE2-6SE-6FN256C Datasheet - Page 63
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LFE2-6SE-6FN256C
Manufacturer Part Number
LFE2-6SE-6FN256C
Description
IC FPGA 6KLUTS 190I/O 256-BGA
Manufacturer
Lattice
Datasheet
1.LFE2-12E-5FN256C.pdf
(385 pages)
Specifications of LFE2-6SE-6FN256C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Lattice Semiconductor
LVDS25E
The top and bottom sides of LatticeECP2/M devices support LVDS outputs via emulated complementary LVCMOS
outputs in conjunction with a parallel resistor across the driver outputs. The scheme shown in Figure 3-1 is one
possible solution for point-to-point signals.
Figure 3-1. LVDS25E Output Termination Example
Table 3-2. LVDS25E DC Conditions
LVCMOS33D
All I/O banks support emulated differential I/O using the LVCMOS33D I/O type. This option, along with the external
resistor network, provides the system designer the flexibility to place differential outputs on an I/O bank with 3.3V
VCCIO. The default drive current for LVCMOS33D output is 12mA with the option to change the device strength to
4mA, 8mA, 16mA or 20mA. Follow the LVCMOS33 specifications for the DC characteristics of the LVCMOS33D.
VCCIO = 2.5V (±5%)
VCCIO = 2.5V (±5%)
V
Z
R
R
R
V
V
V
V
Z
I
DC
Parameter
OUT
OH
OL
OD
BACK
CCIO
T
CM
S
P
8 mA
8 mA
ON-chip
Output Driver Supply (+/-5%)
Driver Impedance
Driver Series Resistor (+/-1%)
Driver Parallel Resistor (+/-1%)
Receiver Termination (+/-1%)
Output High Voltage
Output Low Voltage
Output Differential Voltage
Output Common Mode Voltage
Back Impedance
DC Output Current
OFF-chip
RS=158 ohms
(±1%)
RS=158 ohms
(±1%)
Transmission line, Zo = 100 ohm differential
Description
RP = 140 ohms
(±1%)
3-12
Typical
DC and Switching Characteristics
LatticeECP2/M Family Data Sheet
RT = 100 ohms
(±1%)
100.5
2.50
1.43
1.07
0.35
1.25
6.03
158
140
100
20
OFF-chip ON-chip
Units
mA
Ω
Ω
Ω
Ω
Ω
V
V
V
V
V
+
-
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