HI1-0548-5 Intersil, HI1-0548-5 Datasheet
![IC MULTIPLEXER 8X1 16CDIP](/photos/5/67/56700/20-16-dip_sml.jpg)
HI1-0548-5
Specifications of HI1-0548-5
Available stocks
Related parts for HI1-0548-5
HI1-0548-5 Summary of contents
Page 1
... CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 321-724-7143 All other trademarks mentioned are the property of their respective owners. FN3150.5 Matching ON Intersil (and design registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2003, 2005. All Rights Reserved P-P ...
Page 2
... HI9P546-9Z - (Note) HI1-0547-5 HI1-547 HI3-0547-5 HI3-547 HI3-0547-5Z HI3-0547- (Note) HI4P0547-5 HI4P547 HI4P0547-5Z HI4P547- (Note) HI9P0547-9 HI9P547-9 - HI9P0547-9Z HI9P547-9Z - (Note) HI1-0548-2 HI1-548-2 -55 to 125 16 Ld CERDIP F16.3 HI1-0548-5 HI1-548 HI3-0548-5 HI3-548 HI4P0548-5 HI4P548 Pinouts HI-546 (CERDIP, PDIP, SOIC) TOP VIEW +V 1 SUPPLY ...
Page 3
Pinouts (Continued) HI-546 (PLCC) TOP VIEW HI-548 (CERDIP, ...
Page 4
TRUTH TABLE HI-546 ...
Page 5
Functional Diagrams (Continued) HI-548 OVERVOLTAGE 5V CLAMP AND REF SIGNAL ISOLATION † DIGITAL INPUT PROTECTION Schematic Diagrams ENABLE DELETE DELETE A OR ...
Page 6
Schematic Diagrams (Continued) FROM DECODE OVERVOLTAGE PROTECTION R11 1K IN FROM DECODE 6 HI-546, HI-547, HI-548, HI-549 MULTIPLEX SWITCH OUT P ...
Page 7
Schematic Diagrams (Continued) TTL REFERENCE CIRCUIT R10 REF Q4 D3 GND P OVERVOLTAGE P N PROTECTION 200 Ω V- ADD IN 7 HI-546, HI-547, HI-548, HI-549 ADDRESS INPUT BUFFER AND LEVEL SHIFTER ...
Page 8
Absolute Maximum Ratings ...
Page 9
Electrical Specifications Supplies = +15V, -15V; V Otherwise Specified. For Test Conditions, Consult Test Circuits Section (Continued) PARAMETER MOS Drive, V (HI-546/547 Only) AH Input Leakage Current (High or Low ANALOG CHANNEL CHARACTERISTICS Analog Signal Range ...
Page 10
Test Circuits and Waveforms 1.4 o 1.3 125 C 1.2 1 1.0 o -55 C 0.9 0.8 0.7 0.6 - ANALOG INPUT (V) FIGURE 1B. ON RESISTANCE vs ANALOG INPUT VOLTAGE 100nA ...
Page 11
Test Circuits and Waveforms I A S(OFF) ±10V ± 10V FIGURE 2C. I TEST CIRCUIT (NOTE 9) S(OFF) NOTE: 9. Two measurements per channel: ±10V and 18 ANALOG INPUT CURRENT ( OUTPUT OFF LEAKAGE 3 CURRENT ...
Page 12
Test Circuits and Waveforms ± 15V V SUPPLY 4 = ± 10V V SUPPLY 10K 100K TOGGLE FREQUENCY (Hz) FIGURE 5A. SUPPLY CURRENT vs TOGGLE FREQUENCY 900 = OPEN FOR LOGIC HIGH LEVEL < ...
Page 13
Test Circuits and Waveforms A † 3 HI-546 THRU 50Ω +4V EN OUT GND † Similar connection for HI-547/HI-548/HI-549 FIGURE 7A. TEST CIRCUIT A ...
Page 14
Test Circuits and Waveforms 14 HI-546, HI-547, HI-548, HI-549 o = ±15V 4V 0.8V SUPPLY AH AL ENABLE DRIVE 2V/DIV. DISABLED OUTPUT 2V/DIV. ENABLED (S ON) 1 100ns/DIV. FIGURE ...
Page 15
Die Characteristics DIE DIMENSIONS: 83.9 mils x 159 mils METALLIZATION: Type: CuAl ±2k Å Å Thickness: 16k SUBSTRATE POTENTIAL (NOTE): -V SUPPLY NOTE: The substrate appears resistive to the -V conductor at -V potential. SUPPLY Metallization Mask Layouts HI-546 A ...
Page 16
Die Characteristics DIE DIMENSIONS: 83 mils x 108 mils METALLIZATION: Type: CuAl ±2k Å Å Thickness: 16k SUBSTRATE POTENTIAL (NOTE): -V SUPPLY NOTE: The substrate appears resistive to the -V conductor at -V potential. SUPPLY Metallization Mask Layouts HI-548 IN ...
Page 17
HI-546, HI-547, HI-548, HI-549 17 ...
Page 18
Ceramic Dual-In-Line Frit Seal Packages (CERDIP) -D- -A- E -B- bbb BASE Q PLANE -C- SEATING PLANE aaa ccc ...
Page 19
Dual-In-Line Plastic Packages (PDIP INDEX N/2 AREA -B- -A- D BASE PLANE -C- SEATING PLANE 0.010 (0.25 NOTES: 1. Controlling Dimensions: INCH. In case of conflict between ...
Page 20
Plastic Leaded Chip Carrier Packages (PLCC) 0.042 (1.07) 0.042 (1.07) 0.048 (1.22) 0.056 (1.42) PIN (1) IDENTIFIER 0.050 (1.27 0.020 (0.51) MAX 3 PLCS 0.026 (0.66) 0.032 (0.81) 0.045 (1.14) MIN VIEW “A” ...
Page 21
Small Outline Plastic Packages (SOIC) N INDEX 0.25(0.010) H AREA E - SEATING PLANE - -C- α 0.10(0.004) 0.25(0.010 NOTES: 1. Symbols are defined in the ...
Page 22
Ceramic Dual-In-Line Frit Seal Packages (CERDIP) -D- -A- E -B- bbb BASE Q PLANE -C- SEATING PLANE aaa ccc ...
Page 23
Dual-In-Line Plastic Packages (PDIP INDEX N/2 AREA -B- -A- D BASE PLANE -C- SEATING PLANE 0.010 (0.25 NOTES: 1. Controlling Dimensions: INCH. In case of conflict between ...
Page 24
... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...