ADP5034ACPZ-1-R7 Analog Devices Inc, ADP5034ACPZ-1-R7 Datasheet - Page 18

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ADP5034ACPZ-1-R7

Manufacturer Part Number
ADP5034ACPZ-1-R7
Description
IC REG BUCK DUAL 3MHZ 24-LFCSP
Manufacturer
Analog Devices Inc
Series
-r
Datasheet

Specifications of ADP5034ACPZ-1-R7

Topology
Step-Down (Buck) Synchronous (2), Linear (LDO) (2)
Function
Any Function
Number Of Outputs
4
Frequency - Switching
3MHz
Voltage/current - Output 1
0.8 V ~ 3.8 V, 1.2A
Voltage/current - Output 2
0.8 V ~ 3.8 V, 1.2A
Voltage/current - Output 3
0.8 V ~ 4.75 V, 300mA
W/led Driver
No
W/supervisor
No
W/sequencer
No
Voltage - Supply
2.3 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
*
Package / Case
*
Operating Temperature Range
-40°C To +125°C
No. Of Regulated Outputs
4
Supply Voltage
5.5V
No. Of Step-down Dc - Dc Converters
2
Digital Ic Case Style
LFCSP
No. Of Ldo Regulators
2
Leaded Process Compatible
Yes
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
ADP5034ACPZ-1-R7TR
ADP5034
Thermal Protection
In the event that the junction temperature rises above 150°C,
the thermal shutdown circuit turns off all the regulators. Extreme
junction temperatures can be the result of high current opera-
tion, poor circuit board design, or high ambient temperature.
A 20°C hysteresis is included so that when thermal shutdown
occurs, the regulators do not return to operation until the on-chip
temperature drops below 130°C. When coming out of thermal
shutdown, all regulators restart with soft start control.
Undervoltage Lockout
To protect against battery discharge, undervoltage lockout
(UVLO) circuitry is integrated into the system. If the input
voltage on VIN1 drops below a typical 2.15 V UVLO threshold,
all channels shut down. In the buck channels, both the power
switch and the synchronous rectifier turn off. When the voltage
on VIN1 rises above the UVLO threshold, the part is enabled
once more.
PULL-DOWNS
PULL-DOWN
BUCK1,
BUCK2
VOUT1
VOUT3
VOUT4
VOUT2
LDO1,
LDO2
AVIN
(MIN)
30µs
50µs (MIN)
Figure 46. Regulator Sequencing on the ADP5034 (
Rev. 0 | Page 18 of 28
Alternatively, the user can select device models with a UVLO
set at a higher level, suitable for USB applications. For these
models, the device reaches the turn-off threshold when the
input supply drops to 3.65 V typical.
In case of a thermal or UVLO event, the active pull-downs (if
factory enabled) are enabled to discharge the output capacitors
quickly. The pull-downs remain engaged until the input supply
voltage or thermal fault event is no longer present.
Enable/Shutdown
The ADP5034 has an individual control pin for each regulator.
A logic level high applied to the ENx pin activates a regulator,
whereas a logic level low turns off a regulator.
Figure 46 shows the regulator activation timings for the
ADP5034 when all enable pins are connected to AVIN. Also
shown is the active pull-down activation.
EN1 = EN2 = EN3 = EN4
VUVLO
VPOR
(MIN)
30µs
= V
AVIN
)
50µs (MIN)

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