LMX2332LTM National Semiconductor, LMX2332LTM Datasheet
LMX2332LTM
Specifications of LMX2332LTM
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LMX2332LTM Summary of contents
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... LMX2332L—3 3V. The LMX233XL are available in a TSSOP 20-pin, CSP 24-pin surface mount plastic package, and thin CSP 20-pin surface mount plastic package. PLLatinum ™ trademark of National Semiconductor Corporation. TRI-STATE ® registered trademark of National Semiconductor Corporation. MICROWIRE ™ trademark of National Semiconductor Corporation. ...
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... Connection Diagrams Chip Scale Package (SLB) (Top View) Order Number LMX2330LSBX, LMX2331LSLBX or LMX2332LSLBX NS Package Number SLB24A www.national.com Thin Shrink Small Outline Package (TM) Order Number LMX2330LTM, LMX2331LTM or LMX2332LTM Order Number LMX2330LTMX, LMX2331LTMX, or 1280639 2 12806 Version 9 Revision 2 Print Date/Time: 2011/07/11 15:54:42 1280601 (Top View) ...
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Thin Chipscale Package (SLD) (Top View) Order Number LMX2330LSLDX, LMX2331LSLDX, or LMX2332LSLDX NS Package Number SLD20A 12806 Version 9 Revision 2 1280640 3 Print Date/Time: 2011/07/11 15:54:42 www.national.com ...
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Pin Descriptions Pin No. Pin No. LMX233XLSL LMX233XLSL LMX233XLTM D 20-pin Thin B 24-pin CSP 20-pin TSSOP CSP Package Package Package ...
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Block Diagram Note: The RF prescaler for the LMX2331L/32L is either 64/65 or 128/129, while the prescaler for the LMX2330L is 32/33 or 64/65. Note supplies power to the RF prescaler, N-counter, R-counter and phase detector ...
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... Absolute Maximum Ratings 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Power Supply Voltage Voltage on Any Pin with GND = Storage Temperature Range ( Lead Temperature (solder 4 sec Electrical Characteristics V = 3.0V 3.0V; −40°C < T ...
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Symbol Parameter t Data to Clock Hold Time CH t Clock Pulse Width High CWH t Clock Pulse Width Low CWL t Clock to Load Enable Set Up Time ES t Load Enable Pulse Width EW Note 3: Clock, Data ...
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Charge Pump Current Specification Definitions − Δ sink current sink current Δ sink current ...
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RF Sensitivity Test Block Diagram Note 10,000 Note 2: Sensitivity limit is reached when the error of the divided RF output, F Typical Performance Characteristics LMX2330L ...
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LMX2332L Charge Pump Current HIGH CP Charge Pump Current Variation (See (Note 6) under Charge Pump Current Specification Definitions) www.national.com 1280621 Voltage o 1280623 (See 1280625 10 12806 Version 9 Revision ...
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RF Input Impedance V = 2.7V to 5.5V MHz to 3 GHz CC IN 12806 Version 9 Revision 2 IF Input Impedance V = 2.7V to 5.5V MHz to 1000 MHz CC IN 1280627 ...
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LMX233xSLD RF Input Impedance V = 2.7V to 5.5V 500 MHz to 3 GHz Marker 1 = 500 MHz, Real = 202.98, Imaginary = −200.09 Marker 2 = 1.8 GHz, Real = 32.36, Imaginary ...
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LMX2332L RF Sensitivity vs Frequency Oscillator Input Sensitivity vs Frequency Functional Description The simplified block diagram below shows the 22-bit data register, two 15-bit R Counters and the 15- and 18-bit N Counters (intermediate latches are not shown). The data ...
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PROGRAMMABLE REFERENCE DIVIDERS (IF AND RF R COUNTERS) If the Control Bits are (00 for IF and 01 for RF) data is transferred from the 22-bit shift register into a latch which sets the 15-bit R Counter. ...
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PROGRAMMABLE DIVIDER (N COUNTER) The N counter consists of the 7-bit swallow counter (A counter) and the 11-bit programmable counter (B counter). If the Control Bits are (10 for IF counter and 11 for RF counter) data ...
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PROGRAMMABLE MODES Several modes of operation can be programmed with bits R16–R20 including the phase detector polarity, charge pump TRI-STATE and the output of the F LD pin. The prescaler and powerdown modes are selected with bits N19 and N20. ...
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TABLE 3. The F RF R[19] IF R[19] (RF LD) (IF LD don't care ...
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SERIAL DATA INPUT TIMING Note 1: Parenthesis data indicates programmable reference divider data. Data shifted into register on clock rising edge. Data is shifted in MSB first. Note Data to Clock Set-Up Time Data ...
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Typical Application Example Operational Notes: * VCO is assumed AC coupled increases impedance so that VCO output power is provided to the load rather than the PLL. Typical values are 10Ω to 200Ω depending on the VCO power ...
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Application Information A block diagram of the basic phase locked loop is shown in Figure 1. LOOP GAIN EQUATIONS A linear control system model of the phase feedback for a PLL in the locked state is shown in Figure is ...
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To maintain the same gain/phase relationship at twice the original cutoff frequency, other terms in the gain and phase Equation 4 and Equation 5 sate by the corresponding “1/w” or “1 equations Equations 2, 3 and Equation ...
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... Physical Dimensions 20-Lead (0.173 Wide) Thin Shrink Small Outline Package (TM) Order Number LMX2330LTM, LMX2331LTM or LMX2332LTM Order Number LMX2330LTMX, LMX2331LTMX or LMX2332LTMX www.national.com inches (millimeters) unless otherwise noted *For Tape and Reel (2500 units per reel) NS Package Number MTC20 22 12806 Version 9 Revision 2 Print Date/Time: 2011/07/11 15:54:42 ...
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Chip Scale Package For Tape and Reel (2500 Units per Reel) Order Number LMX2330LSLBX, LMX2331LSLBX or LMX2332LSLBX NS Package Number SLB24A 23 12806 Version 9 Revision 2 Print Date/Time: 2011/07/11 15:54:42 www.national.com ...
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Order Number LMX2330LSLDX, LMX2331LSLDX or LMX2332LSLDX www.national.com 20-Pin Thin Chip Scale Package (SLD) NS Package Number SLD20A 24 12806 Version 9 Revision 2 Print Date/Time: 2011/07/11 15:54:42 ...
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Notes 25 12806 Version 9 Revision 2 Print Date/Time: 2011/07/11 15:54:42 www.national.com ...
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