MC145406DW Freescale Semiconductor, MC145406DW Datasheet - Page 4

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MC145406DW

Manufacturer Part Number
MC145406DW
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC145406DW

Number Of Receivers
3
Number Of Transmitters
3
Number Of Transceivers
1
Data Transmission Topology
Point-to-Point
Receiver Signal Type
Single-Ended
Transmitter Signal Type
Single-Ended
Single Supply Voltage (typ)
Not RequiredV
Single Supply Voltage (min)
Not RequiredV
Single Supply Voltage (max)
Not RequiredV
Dual Supply Voltage (min)
±4.5/4.5V
Dual Supply Voltage (max)
±13.2/5.5V
Power Supply Requirement
Triple
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
16
Package Type
SOIC W
Lead Free Status / Rohs Status
Supplier Unconfirmed

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MC145406
4
DRIVERS
RECEIVERS
DRIVERS
Figure 1. Power–Off Source Resistance (Drivers)
DI1–DI3
Tx1–Tx3
Rx1–Rx3
DO1–DO3
Tx1–Tx3
t PHL
Figure 3. Slew–Rate Characterization
SLEW RATE (SR) =
Figure 2. Switching Characteristics
14
12
10
90%
t SLH
DI1
DI2
DI3
– 3 V
1
V DD
V SS GND
8
50%
90%
3 V
50%
50%
9
V CC
10%
t PHL
Tx1
Tx2
Tx3
16
t f
10%
– 3 V – (3 V)
3
5
7
t f
t PLH
t SLH
R out =
OR
3 V – ( – 3 V)
t PLH
V in
3 V
I
t SHL
t r
– 3 V
t SHL
t r
V in = 2 V
V OL
+ 3 V
0 V
V OH
V OH
V OL
3 V
0 V
V DD
Positive Power Supply (Pin 1)
to + 12V.
V SS
Negative Power Supply (Pin 8)
to – 12 V.
V CC
Digital Power Supply (Pin 16)
power supply (maximum + 5.5 V). V CC must be less than
or equal to V DD .
GND
Ground (Pin 9)
ground pin of the EIA 232–E connector (Pin 7) as well as to
the logic power supply ground.
Rx1, Rx2, Rx3
Receive Data Input (Pins 2, 4, 6)
voltages can range from (V DD + 15 V) to (V SS – 15 V). A volt-
age between + 3 and (V DD + 15 V) is decoded as a space
and causes the corresponding DO pin to swing to ground (0
V); a voltage between – 3 and (V DD – 15 V) is decoded as a
mark and causes the DO pin to swing up to V CC . The actual
turn–on input switchpoint is typically biased at 1.8 V above
ground, and includes 800mV of hysteresis for noise rejec-
tion. The nominal input impedance is 5 k . An open or
grounded input pin is interpreted as a mark, forcing the DO
pin to V CC .
DO1, DO2, DO3
Data Output (Pins 11, 13, 15)
from V CC to GND. A space on the Rx pin causes DO to pro-
duce a logic 0; a mark produces a logic 1. Each output pin is
capable of driving one LSTTL input load.
DI1, DI2, DI3
Data Input (Pins 10, 12,14)
drivers. TTL compatibility is accomplished by biasing the in-
put switchpoint at 1.4 V above GND. However, 5–V CMOS
compatibility is maintained as well. Input voltage levels on
these pins must be between V CC and GND.
Tx1, Tx2, Tx3
Transmit Data Output(Pins 3, 5, 7)
which swing toward V DD and V SS . A logic 1 at a DI input
causes the corresponding Tx output to swing toward V SS . A
logic 0 causes the output to swing toward V DD (the output
voltages will be slightly less than V DD or V SS depending upon
the output load). Output slew rates are limited to a maximum
of 30 V per s. When the MC145406 is off (V DD = V SS = V CC
= GND), the minimum output impedance is 300 .
The most positive power supply pin, which is typically + 5
The most negative power supply pin, which is typically – 5
The digital supply pin, which is connected to the logic
Ground return pin is typically connected to the signal
These are the receiver digital output pins, which swing
These are the high–impedance digital input pins to the
These are the EIA 232–E transmit signal output pins,
These are the EIA 232–E receive signal inputs whose
PIN DESCRIPTIONS
MOTOROLA

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