HD74LS166AP Renesas Electronics America, HD74LS166AP Datasheet - Page 3

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HD74LS166AP

Manufacturer Part Number
HD74LS166AP
Description
Manufacturer
Renesas Electronics America
Type
Not Requiredr
Datasheet

Specifications of HD74LS166AP

Technology
Bipolar
Number Of Elements
1
Number Of Bits
8
Logic Family
LS
Logical Function
Shift Register
Operating Supply Voltage (typ)
5V
Package Type
PDIP
Propagation Delay Time
30ns
Operating Temp Range
-20C to 75C
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
16
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD74LS166AP
Manufacturer:
HITACHI/日立
Quantity:
20 000
HD74LS166A
8-bit Shift Register
The inputs are buffered to lower the drive requirements to one series 74 or 74LS standard load, respectively. Input
clamping diodes minimize switching transients and simplify system design. This parallel in or serial-in, serial-out shift
register has a complexity of 77 equivalent gates on a monolithic chip. This device features gated clock inputs and an
overriding clear input.
The parallel-in or serial-in modes are established by the shift / load input.
When high, this input enables the serial data input and couples the eight flip-flops for serial shifting with each clock
pulse. When low, the parallel (broadside) data inputs are enabled and synchronous loading occurs on the next clock
pulse, during parallel loading, serial data flow is inhibited.
This, of course, allows the system clock to be free running and the register can be stopped on command with the other
clock input. The clock-inhibit input should be changed to the high level only while the clock input is high. A buffered,
direct clear input overrides all other inputs, including the clock, and sets all flip-flops to zero.
Features
Pin Arrangement
Rev.4.00, May 10, 2006, page 1 of 7
Part Name
HD74LS166AP
Ordering Information
Package Type
DILP-16 pin
Parallel
Inputs
Inhibit
Serial
Clock
Clock
Input
GND
C
D
A
B
1
2
3
4
5
6
7
8
Package Code
(Previous Code)
PRDP0016AE-B
(DP-16FV)
(Top view)
Package
Abbreviation
P
16
15
14
13
12
11
10
9
V
Shift/
Load
Parallel
Input H
Output Q
G
F
E
Clear
CC
Parallel
Inputs
H
Taping Abbreviation
(Quantity)
REJ03D0450-0400
May 10, 2006
Rev.4.00

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