AM29LV400BT-90EC Spansion Inc., AM29LV400BT-90EC Datasheet - Page 5
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AM29LV400BT-90EC
Manufacturer Part Number
AM29LV400BT-90EC
Description
Manufacturer
Spansion Inc.
Datasheet
1.AM29LV400BT-90EC.pdf
(48 pages)
Specifications of AM29LV400BT-90EC
Cell Type
NOR
Density
4Mb
Access Time (max)
90ns
Interface Type
Parallel
Boot Type
Top
Address Bus
19/18Bit
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
0C to 70C
Package Type
TSOP
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Asynchronous
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
512K/256K
Supply Current
12mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AM29LV400BT-90EC
Manufacturer:
AMD
Quantity:
668
Company:
Part Number:
AM29LV400BT-90EC
Manufacturer:
AMD
Quantity:
4 950
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 5
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 6
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 8
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 9
Command Definitions . . . . . . . . . . . . . . . . . . . . . 15
Write Operation Status . . . . . . . . . . . . . . . . . . . . 20
December 4, 2006 21523D4
Special Handling Instructions for (FBGA) ......................................7
Word/Byte Configuration ................................................................9
Requirements for Reading Array Data ...........................................9
Writing Commands/Command Sequences .................................. 10
Program and Erase Operation Status .......................................... 10
Standby Mode .............................................................................. 10
Automatic Sleep Mode ................................................................. 10
RESET#: Hardware Reset Pin ..................................................... 10
Output Disable Mode ................................................................... 11
Autoselect Mode .......................................................................... 12
Sector Protection/Unprotection .................................................... 12
Temporary Sector Unprotect ........................................................ 14
Hardware Data Protection ............................................................ 14
Low V
Write Pulse “Glitch” Protection ..................................................... 14
Logical Inhibit ............................................................................... 14
Power-Up Write Inhibit ................................................................. 14
Reading Array Data ...................................................................... 15
Reset Command .......................................................................... 15
Autoselect Command Sequence .................................................. 15
Word/Byte Program Command Sequence ................................... 15
Unlock Bypass Command Sequence ........................................... 16
Chip Erase Command Sequence ................................................. 16
Sector Erase Command Sequence .............................................. 17
Erase Suspend/Erase Resume Commands ................................ 17
DQ7: Data# Polling ...................................................................... 20
RY/BY#: Ready/Busy# ................................................................. 21
DQ6: Toggle Bit I .......................................................................... 21
DQ2: Toggle Bit II ......................................................................... 21
Reading Toggle Bits DQ6/DQ2 .................................................... 21
DQ5: Exceeded Timing Limits ...................................................... 22
DQ3: Sector Erase Timer ............................................................. 22
Table 1. Am29LV400B Device Bus Operations ......................................9
Table 2. Am29LV400BT Top Boot Sector Address Table .....................11
Table 3. Am29LV400BB Bottom Boot Sector Address Table ...............11
Table 4. Am29LV400B Autoselect Codes (High Voltage Method) ........12
Figure 1. In-System Sector Protect/Unprotect Algorithms .................... 13
Figure 2. Temporary Sector Unprotect Operation................................. 14
Figure 3. Program Operation ................................................................ 16
Figure 4. Erase Operation..................................................................... 18
Table 5. Am29LV400B Command Definitions .......................................19
Figure 5. Data# Polling Algorithm ......................................................... 20
Figure 6. Toggle Bit Algorithm............................................................... 22
CC
Write Inhibit .................................................................... 14
D A T A
Am29LV400B
S H E E T
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 24
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 25
Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 27
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 28
Erase And Programming Performance. . . . . . . . 39
Latchup Characteristics . . . . . . . . . . . . . . . . . . . 39
TSOP And SO Pin Capacitance . . . . . . . . . . . . . 39
BGA Ball Capacitance . . . . . . . . . . . . . . . . . . . . . 40
Data Retention . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Read Operations .......................................................................... 28
Hardware Reset (RESET#) .......................................................... 29
Word/Byte Configuration (BYTE#) ............................................. 30
Erase/Program Operations .......................................................... 31
TS 048—48-Pin Standard TSOP ................................................. 41
TSR048—48-Pin Reverse TSOP ................................................. 42
FBA048—48-ball Fine-Pitch Ball Grid Array (FBGA)
6 x 8 mm package ........................................................................ 43
SO 044—44-Pin Small Outline Package ..................................... 44
Revision A (January 1998) ........................................................... 45
Revision B (July 1998) ................................................................. 45
Revision B+1 (August 1998) ........................................................ 45
Revision C (January 1999) ........................................................... 45
Revision C+1 (July 2, 1999) ......................................................... 45
Revision D (January 3, 1999) ....................................................... 45
Revision D+1 (November 8, 2000) ............................................... 45
Revision D+2 (October 30, 2003) ................................................ 45
Revision D+3 (December 13, 2005) ............................................. 45
Revision D4 (December 4, 2006) ................................................. 45
Table 6. Write Operation Status ........................................................... 23
Figure 7. Maximum Negative Overshoot Waveform............................. 24
Figure 8. Maximum Positive Overshoot Waveform .............................. 24
Figure 9. I
Sleep Currents)..................................................................................... 26
Figure 10. Typical I
Figure 11. Test Setup ........................................................................... 27
Table 7. Test Specifications .................................................................. 27
Figure 12. Input Waveforms and Measurement Levels ........................ 27
Figure 13. Read Operations Timings.................................................... 28
Figure 14. RESET# Timings ................................................................. 29
Figure 15. BYTE# Timings for Read Operations .................................. 30
Figure 16. BYTE# Timings for Write Operations .................................. 30
Figure 17. Program Operation Timings ................................................ 32
Figure 18. Chip/Sector Erase Operation Timings ................................. 33
Figure 19. Data# Polling Timings (During Embedded Algorithms) ....... 34
Figure 20. Toggle Bit Timings (During Embedded Algorithms) ............ 34
Figure 21. DQ2 vs. DQ6 ....................................................................... 35
Figure 22. Temporary Sector Unprotect Timing Diagram..................... 35
Figure 23. Sector Protect/Unprotect Timing Diagram........................... 36
Figure 24. Alternate CE# Controlled Write Operation Timings ............. 38
CC1
Current vs. Time (Showing Active and Automatic
CC1
vs. Frequency................................................... 26
3