AM29DL164DT-120WCI Spansion Inc., AM29DL164DT-120WCI Datasheet

no-image

AM29DL164DT-120WCI

Manufacturer Part Number
AM29DL164DT-120WCI
Description
Manufacturer
Spansion Inc.
Datasheet

Specifications of AM29DL164DT-120WCI

Cell Type
NOR
Density
16Mb
Access Time (max)
120ns
Interface Type
Parallel
Boot Type
Top
Address Bus
21/20Bit
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
FBGA
Program/erase Volt (typ)
8.5 to 9.5V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
2M/1M
Supply Current
16mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant
Am29DL16xD
Data Sheet (Retired Product)
Am29DL16xD Cover Sheet
This product family has been retired and is not recommended for designs.
For new and current designs involving TSOP packages, S29JL032H supersedes Am29DL16xD and is the factory-
recommended migration path. Please refer to the S29JL032H data sheet for specifications and ordering information.
For new and current designs involving Fine-pitch BGA (FBGA) packages, S29PL032J supersedes Am29DL16xD and is the
factory-recommended migration path. Please refer to the S29PL-J data sheet for specifications and ordering information.
Availability of this document is retained for reference and historical purposes only.
The following document contains information on Spansion memory products.
Continuity of Specifications
There is no change to this data sheet as a result of offering the device as a Spansion product. Any changes that have been
made are the result of normal data sheet improvement and are noted in the document revision summary.
For More Information
Please contact your local sales office for additional information about Spansion memory solutions.
Publication Number 21533
Revision E
Amendment 6
Issue Date February 26, 2009

Related parts for AM29DL164DT-120WCI

AM29DL164DT-120WCI Summary of contents

Page 1

Am29DL16xD Data Sheet (Retired Product) This product family has been retired and is not recommended for designs. For new and current designs involving TSOP packages, S29JL032H supersedes Am29DL16xD and is the factory- recommended migration path. Please refer to the S29JL032H ...

Page 2

This page left intentionally blank Am29DL16xD 21533_E6 February 26, 2009 ...

Page 3

... Data Management Software (DMS) — AMD-supplied software manages data programming and erasing, enabling EEPROM emulation — Eases sector erase limitations ■ Supports Common Flash Memory Interface (CFI) ■ Erase Suspend/Erase Resume — Suspends erase operations to allow programming in same bank ■ Data# Polling and Toggle Bits — ...

Page 4

... both. Customer Lockable parts may utilize the Se- cured Silicon Sector as bonus space, reading and writing like any other flash sector, or may permanently lock their own code there. DMS (Data Management Software) allows systems to easily take advantage of the advanced architecture of the simultaneous read/write product line by allowing re- moval of EEPROM devices ...

Page 5

... Hardware Data Protection ............................................................ 21 Low VCC Write Inhibit ............................................................... 22 Write Pulse “Glitch” Protection .................................................. 22 Logical Inhibit ............................................................................ 22 Power-Up Write Inhibit .............................................................. 22 Common Flash Memory Interface (CFI Table 10. CFI Query Identification String .............................................. 22 Table 11. System Interface String......................................................... 23 Table 12. Device Geometry Definition .................................................. 23 Table 13. Primary Vendor-Specific Extended Query ............................ 24 Command Definitions . . . . . . . . . . . . . . . . . . . . . . 25 Reading Array Data ...

Page 6

PRODUCT SELECTOR GUIDE Part Number Speed Option Standard Voltage Range: V Max Access Time (ns) CE# Access (ns) OE# Access (ns) BLOCK DIAGRAM A0–A19 RY/BY# A0–A19 RESET# STATE CONTROL WE# & CE# COMMAND BYTE# REGISTER WP#/ACC ...

Page 7

CONNECTION DIAGRAMS A15 1 A14 2 3 A13 A12 4 A11 5 A10 A19 WE# 11 RESET WP#/ACC 14 RY/BY A18 A17 ...

Page 8

CONNECTION DIAGRAMS A13 A12 WE# RESET RY/BY# WP#/ACC A17 ...

Page 9

... A17 Special Package Handling Instructions Special handling is required for Flash Memory prod- ucts in molded packages (BGA, TSOP, SO, PLCC, PDIP). The package and/or data integrity may be com temperatures above 150°C for prolonged periods of time. February 26, 2009 21533E6 48-Ball Very Thin Profile Fine-pitch BGA ...

Page 10

PIN DESCRIPTION A0–A19 = 20 Addresses DQ0–DQ14 = 15 Data Inputs/Outputs DQ15/A-1 = DQ15 (Data Input/Output, word mode), A-1 (LSB Address Input, byte mode) CE# = Chip Enable OE# = Output Enable WE# = Write Enable WP#/ACC = Hardware Write ...

Page 11

... AM29DL163DT70, AM29DL163DB70 AM29DL164DT70, AM29DL164DB70 AM29DL161DT90, AM29DL161DB90 AM29DL162DT90, AM29DL162DB90 EI, EF AM29DL163DT90, AM29DL163DB90 AM29DL164DT90, AM29DL164DB90 AM29DL161DT120, AM29DL161DB120 AM29DL162DT120, AM29DL162DB120 AM29DL163DT120, AM29DL163DB120 AM29DL164DT120, AM29DL164DB120 Note: Ordering numbers containing PCI are identified on device packages with PI. The same applies to WCI and VI, as well as VRI and UI. ...

Page 12

DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory loca- tion. The register is a latch ...

Page 13

... I in the DC Characteristics table represents the CC3 standby current specification. Automatic Sleep Mode The automatic sleep mode minimizes Flash device en- ergy consumption. The device automatically enables this mode when addresses remain stable for t Am29DL16xD in the DC Characteristics table ± 0 ...

Page 14

... The RESET# pin may be tied to the system reset cir- cuitry. A system reset would thus also reset the Flash memory, enabling the system to read the boot-up firm- ware from the Flash memory. If RESET# is asserted during a program or erase op- eration, the RY/BY# pin remains a “0” (busy) until the ...

Page 15

... A19:A0 in word mode (BYTE#= and A19 for Am29DL164DT. Sector Address A19–A12 11111xxx Am29DL16xD (x8) (x16) Address Range 00000h–07FFFh 08000h–0FFFFh 10000h–17FFFh 18000h–1FFFFh 20000h–27FFFh 28000h–2FFFFh 30000h–37FFFh 38000h– ...

Page 16

Table 5. Sector Addresses for Bottom Boot Sector Devices Sector Address Sector SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SA20 SA21 SA22 SA23 SA24 SA25 SA26 SA27 ...

Page 17

Autoselect Mode The autoselect mode provides manufacturer and de- vice identification, and sector protection verification, through identifier codes output on DQ7–DQ0. This mode is primarily intended for programming equip ...

Page 18

... The alternate method intended only for programming equipment requires V This method is compatible with programmer routines written for earlier 3.0 volt-only AMD flash devices. Publication number 22243 contains further details; contact an AMD representative to request a copy. The device is shipped with all sectors unprotected. ...

Page 19

... AMD’s ExpressFlash™ Service. Contact an AMD representative for details possible to determine whether a sector is pro- tected or unprotected. See the Autoselect Mode section for details. Write Protect (WP#) The Write Protect function provides a hardware method of protecting certain boot sectors without using V . This function is one of two provided by the ID WP#/ACC pin ...

Page 20

START PLSCNT = 1 RESET Wait 1 μs No First Write Temporary Sector Cycle = 60h? Unprotect Mode Yes Set up sector address Sector Protect: Write 60h to sector address with ...

Page 21

... Customer Lockable: Secured Silicon Sector NOT Programmed or Protected At the Factory If the security feature is not required, the Secured Sili- con Sector can be treated as an additional Flash memory space, expanding the size of the available Flash array. Current version of device has 64 Kbytes; future versions will have only 256 bytes. ...

Page 22

... Software support can then be device-inde- pendent, JEDEC ID-independent, and forward- and backward-compatible for the specified flash device CC families. Flash vendors can standardize their existing interfaces for long-term compatibility. This device enters the CFI Query mode when the sys- . tem writes the CFI Query command, 98h, to address ...

Page 23

... Max. timeout for full chip erase 2 Table 12. Device Geometry Definition Data N 0015h Device Size = 2 byte 0002h Flash Device Interface description (refer to CFI publication 100) 0000h 0000h Max. number of bytes in multi-byte write = 2 0000h (00h = not supported) 0002h Number of Erase Block Regions within device ...

Page 24

Table 13. Primary Vendor-Specific Extended Query Addresses Addresses (Word Mode) (Byte Mode) 40h 80h 41h 82h 42h 84h 43h 86h 44h 88h 45h 8Ah 46h 8Ch 47h 8Eh 48h 90h 49h 92h 4Ah 94h 4Bh 96h 4Ch 98h 4Dh 9Ah ...

Page 25

COMMAND DEFINITIONS Writing specific address and data commands or se- quences into the command register initiates device operations. Table 14 defines the valid register com- mand sequences. Writing incorrect address and data values or writing them in the improper se- ...

Page 26

... The Exit Secured Silicon Sector command sequence returns the device to normal op- eration. Table 14 shows the address and data requirements for both command sequences. See also “Secured Silicon Sector Flash Memory Region” for fur (RESET#=V ) will reset the device to reading array IL data ...

Page 27

Write Program Command Sequence Data Poll from System Embedded Program algorithm in progress Verify Data? No Increment Address Last Address? Programming Completed Note: See Table 14 for program command sequence. Figure 3. Program Operation Chip Erase Command Sequence Chip erase ...

Page 28

Write Operation Status section for information on these status bits. Once the sector erase operation has begun, only the Erase Suspend command is valid. All other com- mands are ignored. However, note that a hardware reset immediately terminates ...

Page 29

Command Definitions Table 14. Am29DL16xD Command Definitions Command Sequence (Note 1) Addr Read (Note 6) 1 Reset (Note 7) 1 XXX Word 555 Manufacturer ID 4 Byte AAA Word 555 Device ID 4 Byte AAA Secured Silicon™ Word 555 Factory ...

Page 30

WRITE OPERATION STATUS The device provides several bits to determine the sta- tus of a program or erase operation: DQ2, DQ3, DQ5, DQ6, and DQ7. Table 15 and the following subsec- tions describe the function of these bits. DQ7 and ...

Page 31

RY/BY#: Ready/Busy# The RY/BY dedicated, open-drain output pin which indicates whether an Embedded Algorithm is in progress or complete. The RY/BY# status is valid after the rising edge of the final WE# pulse in the command sequence. Since ...

Page 32

DQ2: Toggle Bit II The “Toggle Bit II” on DQ2, when used with DQ6, indi- cates whether a particular sector is actively erasing (that is, the Embedded Erase algorithm is in progress), or whether that sector is erase-suspended. Toggle Bit ...

Page 33

Status Embedded Program Algorithm Standard Mode Embedded Erase Algorithm Erase Suspended Sector Erase-Suspend- Erase Read Suspend Non-Erase Mode Suspended Sector Erase-Suspend-Program Notes: 1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum timing ...

Page 34

ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . . –65°C to +150°C Ambient Temperature with Power Applied ...

Page 35

DC CHARACTERISTICS CMOS Compatible Parameter Symbol Parameter Description I Input Load Current Input Load Current LIT I Output Leakage Current LO V Active Read Current CC I CC1 (Notes Active Write Current (Notes ...

Page 36

... DC CHARACTERISTICS Zero-Power Flash 500 1000 Note: Addresses are switching at 1 MHz Figure 9. I Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 Note ° 1500 2000 2500 Time Frequency in MHz Figure 10. Typical I vs. Frequency CC1 Am29DL16xD 3000 3500 4000 3.6 V 2.7 V ...

Page 37

TEST CONDITIONS Device Under Test C 6.2 kΩ L Note: Diodes are IN3064 or equivalent Figure 11. Test Setup Key To Switching Waveforms WAVEFORM Don’t Care, Any Change Permitted 3.0 V 1.5 V Input 0.0 V Figure 12. Input Waveforms ...

Page 38

AC CHARACTERISTICS Read-Only Operations Parameter JEDEC Std Description t t Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV Output Enable to Output ...

Page 39

AC CHARACTERISTICS Hardware Reset (RESET#) Parameter JEDEC Std RESET# Pin Low (During Embedded Algorithms) t Ready to Read Mode (See Note) RESET# Pin Low (NOT During Embedded t Ready Algorithms) to Read Mode (See Note) t RESET# Pulse Width RP ...

Page 40

AC CHARACTERISTICS Word/Byte Configuration (BYTE#) Parameter JEDEC Std Description t t CE# to BYTE# Switching Low or High ELFL/ ELFH t BYTE# Switching Low to Output HIGH Z FLQZ t BYTE# Switching High to Output Active FHQV CE# OE# BYTE# ...

Page 41

AC CHARACTERISTICS Erase and Program Operations Parameter JEDEC Std Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL AS Address Setup Time to OE# low during toggle bit t ASO polling t t ...

Page 42

AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE# OE# WE Data RY/BY VCS Notes program address program data Illustration shows device in word ...

Page 43

AC CHARACTERISTICS Erase Command Sequence (last two cycles Addresses 2AAh CE Data 55h RY/BY# t VCS V CC Notes sector address (for Sector Erase Valid ...

Page 44

AC CHARACTERISTICS t WC Valid PA Addresses t AH CE# OE WE# t WPH Valid Data In WE# Controlled Write Cycle Figure 20. Back-to-back Read/Write Cycle Timings t RC Addresses VA t ACC t ...

Page 45

AC CHARACTERISTICS Addresses CE# t OEH WE# OE Valid Data DQ6/DQ2 RY/BY# Note Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last status read cycle, and array data read ...

Page 46

AC CHARACTERISTICS Temporary Sector/Sector Block Unprotect Parameter JEDEC Std Description t V Rise and Fall Time (See Note) VIDR Rise and Fall Time (See Note) VHH HH RESET# Setup Time for Temporary t RSP Sector/Sector Block Unprotect ...

Page 47

AC CHARACTERISTICS RESET# SA, A6, A1, A0 Sector/Sector Block Protect or Unprotect Data 60h 1 µs CE# WE# OE# * For sector protect For sector unprotect, A6 ...

Page 48

AC CHARACTERISTICS Alternate CE# Controlled Erase and Program Operations Parameter JEDEC Std Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time ELAX Data Setup ...

Page 49

AC CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes: 1. Figure indicates last two bus cycles of a program or erase operation ...

Page 50

ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Chip Erase Time Byte Program Time Word Program Time Accelerated Byte/Word Program Time Byte Mode Chip Program Time (Note 3) Word Mode Notes: 1. Typical program and erase times assume the following ...

Page 51

PHYSICAL DIMENSIONS FBC048—48-Ball Fine-Pitch Ball Grid Array package February 26, 2009 21533E6 Am29DL16xD Dwg rev AF; 10/99 51 ...

Page 52

PHYSICAL DIMENSIONS LAA064—64-Ball Fortified Ball Grid Array package Am29DL16xD 21533E6 February 26, 2009 ...

Page 53

PHYSICAL DIMENSIONS TS 048—48-Pin Standard TSOP February 26, 2009 21533E6 Am29DL16xD Dwg rev AA; 10/99 53 ...

Page 54

PHYSICAL DIMENSIONS VBF048—48-Ball Very Thin Profile Fine-Pitch Ball Grid Array Am29DL16xD 21533E6 February 26, 2009 ...

Page 55

... Supply Voltages: Replaced single voltage range CC with voltage ranges for standard and regulated devices. Revision C+1 (March 19, 1999) Secured Silicon (Secured Silicon) Sector Flash Memory Region Customer Lockable subsection: In the bullets, text should refer to “Enter Secured Silicon Sector Region command sequence.” ...

Page 56

... Sector/Sector Block Protection and Unprotection Noted that sectors are unprotected in parallel. Secured Silicon Sector Flash Memory Region Noted changes for upcoming versions of these de- vices: reduced Secured Silicon Sector size and dele- tion of Secured Silicon Sector erase functionality. ...

Page 57

... Copyright © 1998–2005 Advanced Micro Devices, Inc. All rights reserved. AMD, the AMD logo, and combinations thereof are registered trade- marks of Advanced Micro Devices, Inc. ExpressFlash is a trademark of Advanced Micro Devices, Inc. Product names used in this publication are for identification purposes only and may be trademarks of their respective companies. Copyright © 2006-2009 Spansion Inc. All rights reserved. Spansion ™ ™ ...

Related keywords