LH28F640BFE-PBTL80 Sharp Electronics, LH28F640BFE-PBTL80 Datasheet - Page 4
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LH28F640BFE-PBTL80
Manufacturer Part Number
LH28F640BFE-PBTL80
Description
Manufacturer
Sharp Electronics
Datasheet
1.LH28F640BFE-PBTL80.pdf
(36 pages)
Specifications of LH28F640BFE-PBTL80
Cell Type
NOR
Density
64Mb
Access Time (max)
80ns
Interface Type
Parallel
Boot Type
Bottom
Address Bus
22b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
0C to 70C
Package Type
TSOP
Sync/async
Asynchronous
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
16b
Number Of Words
4M
Supply Current
25mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant
The product, which is 4-Plane Page Mode Dual Work (Simultaneous Read while Erase/Program) Flash memory, is a low
power, high density, low cost, nonvolatile read/write storage solution for a wide range of applications. The product can
operate at V
battery life for portable applications.
The product provides high performance asynchronous page mode. It allows code execution directly from Flash, thus
eliminating time consuming wait states. Furthermore, its newly configurative partitioning architecture allows flexible dual
work operation.
The memory array block architecture utilizes Enhanced Data Protection features, and provides separate Parameter and Main
Blocks that provide maximum flexibility for safe nonvolatile code and data storage.
Fast program capability is provided through the use of high speed Page Buffer Program.
Special OTP (One Time Program) block provides an area to store permanent code such as a unique number.
* ETOX is a trademark of Intel Corporation.
• 80/35ns 8-Word Page Mode
• Flexible Partitioning
• Read operations during Block Erase or (Page Buffer)
• Status Register for Each Partition
• 2.7V Read and Write Operations
• V
• Automatic Power Savings Mode Reduces I
• 5 s Typical Erase/Program Suspends
• 4-Word Factory-Programmed Area
• 4-Word User-Programmable Area
• 16-Word Page Buffer
• 5 s/Word (Typ.) at 12V V
64M density with 16Bit I/O Interface
High Performance Reads
Configurative 4-Plane Dual Work
Low Power Operation
Enhanced Code + Data Storage
OTP (One Time Program) Block
High Performance Program with Page Buffer
Operating Temperature 0 C to +70 C
CMOS Process (P-type silicon substrate)
Program
in Static Mode
CCQ
for Input/Output Power Supply Isolation
CC
=2.7V-3.6V and V
Page Mode Dual Work Flash MEMORY
PP
PP
=1.65V-3.6V or 11.7V-12.3V. Its low voltage operation capability greatly extends
LH28F640BFE-PBTL80
64Mbit (4Mbit 16)
CCR
LHF64FA3
• Eight 4K-word Parameter Blocks
• One-hundred and twenty-seven 32K-word Main
• Bottom Parameter Location
• Individual Block Lock and Block Lock-Down with
• All blocks are locked at power-up or device reset.
• Absolute Protection with V
• Block Erase, Full Chip Erase, (Page Buffer) Word
• 3.0V Low-Power
• 12V No Glue Logic 9 s/Word (Typ.)
• Basic Command Set
• Common Flash Interface (CFI)
• Minimum 100,000 Block Erase Cycles
Flexible Blocking Architecture
Enhanced Data Protection Features
Automated Erase/Program Algorithms
Cross-Compatible Command Support
Extended Cycling Capability
48-Lead TSOP
ETOX
Not designed or rated as radiation hardened
Blocks
Zero-Latency
Program Lockout during Power Transitions
Programming
Production Programming and 0.5s Erase (Typ.)
TM*
Flash Technology
s/Word (Typ.)
PP
V
PPLK
Rev. 2.44
2