CY7B994V-2AI Cypress Semiconductor Corp, CY7B994V-2AI Datasheet - Page 5

• Manufacturer Part Number: CY7B994V-2AI
• Manufacturer: Cypress Semiconductor Corp
• Type: Zero Delay PLL Clock Bufferr

Specifications of CY7B994V-2AI

• Number Of Elements: 1
• Supply Current: 250mA
• Pll Input Freq (min): 24MHz
• Pll Input Freq (max): 200MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TQFP
• Output Frequency Range: 24 to 200MHz
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temperature Classification: Industrial
• Pin Count: 100
• Lead Free Status / Rohs Status: Not Compliant

Document #: 38-07127 Rev. *F
Table 1. Frequency Range Select
Time Unit Definition
Selectable skew is in discrete increments of time unit (t
value of a t
nominal output frequency. The equation to be used to
determine the t
t
N is a multiplication factor which is determined by the FS
setting. f
in Table 2.
Table 2. N Factor Determination
Divide and Phase Select Matrix
The Divide and Phase Select Matrix is comprised of five
independent banks: four banks of clock outputs and one bank
for feedback. Each clock output bank has two pairs of
low-skew, high-fanout output buffers ([1:4]Q[A:B][0:1]), two
phase function select inputs ([1:4]F[0:1]), two divider function
selects ([1:4]DS[0:1]), and one output disable (DIS[1:4]).
The feedback bank has one pair of low-skew, high-fanout
output buffers (QFA[0:1]). One of these outputs may connect
to the selected feedback input (FBK[A:B]±). This feedback
bank also has one phase function select input (FBF0), two
divider function selects FSDS[0:1], and one output disable
(FBDIS).
The phase capabilities that are chosen by the phase function
select pins are shown in Table 3. The divide capabilities for
each bank are shown in Table 4.
Notes:
LOW
MID
HIGH
LOW
MID
HIGH
U
2. The level to be set on FS is determined by the “nominal” operating frequency (f
3. BK1, BK2 denotes following the skew setting of Bank1 and Bank2, respectively.
FS
= 1/(f
the output is operating in the undivided mode. The REF and FB are at f
FS
[2]
NOM
NOM
U
16
64
32
N
*N).
is determined by the FS setting and the maximum
Min.
is nominal frequency of the device. N is defined
12
24
48
U
f
CY7B993V
CY7B993V
NOM
value is as follows:
which t
f
NOM
(MHz)
15.625
31.25
62.5
(MHz) at
U
Max.
100
=1.0 ns
26
52
32
16
N
8
Min.
24
48
96
f
CY7B994V
CY7B994V
which t
NOM
f
NOM
(MHz)
31.25
62.5
125
(MHz) at
U
Max.
=1.0 ns
100
200
52
U
). The
NOM
when the output connected to FB is undivided.
NOM
Table 3. Output Skew Select Function
Table 4. Output Divider Function
Figure 1 illustrates the timing relationship of programmable
skew outputs. All times are measured with respect to REF with
the output used for feedback programmed with 0t
PLL naturally aligns the rising edge of the FB input and REF
input. If the output used for feedback is programmed to
another skew position, then the whole t
respect to REF. For example, if the output used for feedback
is programmed to shift –8t
forward in time by 8t
of skew will effectively be skewed 16t
[1:4]DS1
[1:4]F1
HIGH
HIGH
HIGH
LOW
LOW
LOW
FBDS1
) of the V
MID
MID
MID
HIGH
HIGH
HIGH
LOW
LOW
LOW
MID
MID
MID
and
Function
Selects
Function
Selects
CO
[1:4]F0
HIGH
HIGH
HIGH
FBF0
LOW
LOW
LOW
MID
MID
MID
and
[1:4]DS0
and Phase Generator. f
FBDS0
HIGH
HIGH
HIGH
LOW
LOW
LOW
MID
MID
MID
and
Bank1
–4t
–3t
–2t
–1t
+1t
+2t
+3t
+4t
0t
U
U
. Thus an output programmed with 8t
Bank
U
U
U
U
U
U
U
U
/10
/12
/1
/2
/3
/4
/5
/6
/8
1
U
Output Skew Function
Bank2
Output Divider Function
, then the whole matrix is shifted
–4t
–3tu
–2t
–1t
+1t
+2t
+3t
+4t
0t
NOM
Bank
U
/10
/12
U
U
U
U
U
U
U
/1
/2
/3
/4
/5
/6
/8
2
always appears on an output when
BK1
BK2
Bank3
–8t
–7t
–6t
+6t
+7t
+8t
U
0t
Bank
RoboClock
/10
/12
with respect to REF.
U
U
/1
/2
/3
/4
/5
/6
/8
U
U
U
U
U
U
3
[3]
[3]
matrix will shift with
CY7B993V
CY7B994V
BK1
BK2
Bank4
+6t
+7t
+8t
–8t
–7t
–6t
Bank
0t
/10
/12
/1
/2
/3
/4
/5
/6
/8
Page 5 of 15
4
U
U
U
U
U
U
U
[3]
[3]
U
skew. The
Feed-
Feed-
Bank
back
+4t
Bank
–4t
back
NA
NA
NA
0tu
NA
NA
NA
/10
/12
/1
/2
/3
/4
/5
/6
/8

U
U
U
[+] Feedback