CY62256LL-70ZRI Cypress Semiconductor Corp, CY62256LL-70ZRI Datasheet - Page 2
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CY62256LL-70ZRI
Manufacturer Part Number
CY62256LL-70ZRI
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY62256LL-70ZRI.pdf
(14 pages)
Specifications of CY62256LL-70ZRI
Density
256Kb
Access Time (max)
70ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
5V
Address Bus
15b
Package Type
RTSOP-I
Operating Temp Range
-40C to 85C
Number Of Ports
1
Supply Current
50mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
28
Word Size
8b
Number Of Words
32K
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY62256LL-70ZRI
Manufacturer:
SMD
Quantity:
240
Part Number:
CY62256LL-70ZRI
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Document #: 38-05248 Rev. *F
Product Portfolio
Pin Configurations
Pin Definitions
CY62256L
CY62256LL
CY62256LL
CY62256LL
1–10, 21, 23–26
11–13, 15–19,
27
20
22
14
28
Note:
2. Typical specifications are the mean values measured over a large sample size across normal production process variations and are taken at nominal conditions
(T
A
= 25°C, V
Pin Number
GND
Product
I/O 0
I/O 1
I/O 2
A 10
A 11
A 12
A 13
A 14
A 5
A 6
A 7
A 8
A 9
CC
). Parameters are guaranteed by design and characterization, and not 100% tested.
Narrow SOIC
Com’l/Ind’l
Commercial
Industrial
Automotive
Top View
13
14
1
2
3
4
5
6
7
8
9
10
11
12
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Input
Input/Output
Input/Control
Input/Control
Input/Control
Ground
Power Supply V
I/O 3
V CC
WE
A 4
A 3
A 2
A 1
OE
A 0
CE
I/O 7
I/O 6
I/O 5
I/O 4
Type
Min.
4.5
A
I/O
WE. When selected LOW, a WRITE is conducted. When selected HIGH, a READ is
conducted
CE. When LOW, selects the chip. When HIGH, deselects the chip
OE. Output Enable. Controls the direction of the I/O pins. When LOW, the I/O pins
behave as outputs. When deasserted HIGH, I/O pins are Tri-stated, and act as input
data pins
GND. Ground for the device
CC
0
–A
0
GND
–/O
I/O 0
I/O 1
I/O 2
. Power supply for the device
V
A 10
A 11
A 12
A 13
A 14
14
A 5
A 6
A 7
A 8
A 9
CC
Typ.
. Address Inputs
7
. Data lines. Used as input or output lines depending on operation
Range (V)
5.0
Top View
13
14
1
2
3
4
5
6
7
8
9
10
11
12
[2]
DIP
28
27
26
25
24
23
22
21
20
19
18
17
16
15
I/O 3
V CC
WE
A 4
A 3
A 2
A 1
OE
A 0
CE
I/O 7
I/O 6
I/O 5
I/O 4
Max.
5.5
Speed
Description
55/70
55/70
(ns)
70
55
V
WE
A
A
OE
V
A
A
WE
CC
A
A
A
A
A
A
A
A
A
OE
10
11
CC
A
A
A
A
A
A
A
A
A
11
10
1
2
3
4
5
6
7
8
9
9
8
6
5
4
3
2
1
7
22
23
24
25
26
4
5
6
7
27
28
1
2
3
26
25
24
23
22
7
6
5
4
3
2
1
28
27
Typ.
Operating, I
25
25
25
25
[2]
Reverse Pinout
(not to scale)
(not to scale)
(mA)
Top View
TSOP I
Top View
Power Dissipation
TSOP I
Max.
50
50
50
50
CC
Typ.
Standby, I
CY62256
0.1
0.1
0.1
2
10
11
12
13
14
15
16
17
18
19
20
21
21
20
19
18
17
16
15
14
13
12
11
10
8
9
Page 2 of 14
9
8
[2]
(µA)
A
CE
I/O
I/O
I/O
I/O
I/O
GND
I/O
I/O
I/O
A
A
A
A
A
A
I/O
I/O
I/O
GND
I/O
I/O
I/O
I/O
I/O
CE
A
0
14
13
12
12
13
14
0
7
6
5
4
3
2
1
0
0
1
2
3
4
5
6
7
Max.
SB2
50
10
15
5
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