CY7C194B-15PC Cypress Semiconductor Corp, CY7C194B-15PC Datasheet
CY7C194B-15PC
Specifications of CY7C194B-15PC
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CY7C194B-15PC Summary of contents
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... Output enable (OE) is supported only in CY7C195B. See the Truth Table in this data sheet for a complete description of read and write modes. The CY7C194B-CY7C195B is available in 24 DIP, 24 SOJ, 28 DIP, and 28 SOJ package(s). Input Buffer RAM Array Power ...
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... Pin Layout and Specifications CY7C195B 28 DIP (6.9 × 35.6 × 3.5 mm) – P21 CY7C195B 28 SOJ (8 × 18 × 3.5 mm) – V21 Document #: 38-05409 Rev I/O 0 GND I/O 0 GND CY7C194B CY7C195B Page [+] Feedback ...
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... Pin Layout and Specifications CY7C194B 24 SOJ (8 × 15 × 3.5 mm) – V13 GND CY7C194B 24 DIP (6.6 × 31.8 × 3.5 mm) – P13 GND Document #: 38-05409 Rev. *A (continued CY7C194B CY7C195B Page [+] Feedback ...
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... No Connect. Pins are not internally connected to the die. OE Control Output Enable (CY7C195 only). V Supply Power (5.0V Control Write Enable. CY7C195B Truth Table CY7C194B Truth Table Input/Output H X High Data Out L L Data In Document #: 38-05409 Rev. *A Description 28 DIP 10, 11, 22, 23, 24, 25, 26 16, 17 ...
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... V – MAX - 0.3v, – ≤ 0.3 Output Dis- – – Conditions T = 25C MHz 5.0V CC CY7C194B CY7C195B Value Unit –65 to +150 °C –55 to +125 °C –0.5 to +7.0 V –0 null > 2001 V > 200 mA Voltage Range ( 5.0V ± 10 Min Max Min Max Unit 2 ...
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... V CC 90% 10 Rise Time 1 V/ns * including scope and jig capacitance Nom 480 255 480 255 167 1.73 Conditions 28 SOJ 24 SOJ 69 TBD 29.84 TBD CY7C194B CY7C195B Output Loads for & t HZOE HZCE HZWE (B)* 90% 10% Fall Time 1 V/ns Unit pF Ω DIP 24 DIP Unit ...
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... HZCE LZCE HZOE LZOE CY7C194B CY7C195B 25 ns Max Min Max Unit – 25 – – – 3 – – – – 0 – – – 3 – – ...
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... WE is HIGH for Read Cycle. 11. This cycle is OE Controlled and WE is HIGH read cycle. 12. Address valid prior to or coincident with CE transition LOW. Document #: 38-05409 Rev OHA ACE t DOE t LZOE t LZCE t PU 50% CY7C194B CY7C195B Data Valid t HZCE t HZOE High Z Data Valid t PD 50% Page [+] Feedback ...
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... During this period the I/Os are in output state and input signals should not be applied. 16. This cycle is CE controlled. 17. Data In/Out is high impedance 18 goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state. Document #: 38-05409 Rev SCE PWE t SD Data-In Valid SCE Data-In Valid . . CY7C194B CY7C195B High Z Page [+] Feedback ...
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... Address Data Undefined In/Out see footnotes Ordering Information Speed Ordering Code 12 ns CY7C195B-12VC 15 ns CY7C194B-15PC 15 ns CY7C194B-15VC 15 ns CY7C195B-15VC 25 ns CY7C194B-25VC 25 ns CY7C195B-25PC Notes: 19. The cycle is WE controlled, OE low. The minimum write cycle time is the sum of t Document #: 38-05409 Rev SCE ...
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... Document #: 38-05409 Rev. *A 24-Lead (300-Mil) Molded SOJ V13 28-Lead (300-Mil) Molded SOJ V21 PIN 0.291 0.330 0.300 0.350 28 OPTION 1 SEATING PLANE 0.120 0.140 0.004 0.025 MIN. CY7C194B CY7C195B 51-85030-A A DETAIL EXTERNAL LEAD DESIGN 0.026 0.032 0.013 0.014 0.019 0.020 OPTION 2 0.007 0.013 0.262 ...
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... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 24-Lead (300-Mil) PDIP P13 28-Lead (300-Mil) Molded DIP P21 CY7C194B CY7C195B 51-85013-*B 51-85014-*B ...
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... Document History Page Document Title: CY7C194B-CY7C195B 256 Kb (64K x 4) Static RAM Document Number: 38-05409 REV. ECN No. Issue Date ** 129234 09/16/03 *A 129786 09/18/03 Document #: 38-05409 Rev. *A Orig. of Change Description of Change HGK New Data Sheet AJU Found typos in AC Electrical Characteristics table. Modified the following: t from 10, 12 and and 18 ...