AM29LV033C-90EI Spansion Inc., AM29LV033C-90EI Datasheet

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AM29LV033C-90EI

Manufacturer Part Number
AM29LV033C-90EI
Description
Manufacturer
Spansion Inc.
Datasheet

Specifications of AM29LV033C-90EI

Cell Type
NOR
Density
32Mb
Access Time (max)
90ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
22b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
4M
Supply Current
16mA
Mounting
Surface Mount
Pin Count
40
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AM29LV033C-90EI
Manufacturer:
AMD
Quantity:
1 000
Part Number:
AM29LV033C-90EI
Manufacturer:
AMD
Quantity:
20 000
Am29LV033C
Data Sheet
RETIRED
PRODUCT
This product has been retired and is not recommended for designs. For new and current designs,
S29AL032D supersedes Am29LV033C and is the factory-recommended migration path. Please refer
to the S29AL032D datasheet for specifications and ordering information. Availability of this docu-
ment is retained for reference and historical purposes only.
The following document contains information on Spansion memory products.
Continuity of Specifications
There is no change to this data sheet as a result of offering the device as a Spansion product. Any
changes that have been made are the result of normal data sheet improvement and are noted in the
document revision summary.
For More Information
Please contact your local sales office for additional information about Spansion memory solutions.
Publication Number 22268
Revision B
Amendment +5
Issue Date September 12, 2006

Related parts for AM29LV033C-90EI

AM29LV033C-90EI Summary of contents

Page 1

... Data Sheet This product has been retired and is not recommended for designs. For new and current designs, S29AL032D supersedes Am29LV033C and is the factory-recommended migration path. Please refer to the S29AL032D datasheet for specifications and ordering information. Availability of this docu- ment is retained for reference and historical purposes only. ...

Page 2

THIS PAGE LEFT INTENTIONALLY BLANK. ...

Page 3

... CMOS 3.0 Volt-only Uniform Sector Flash Memory This product has been retired and is not recommended for designs. For new and current designs, S29AL032D supersedes Am29LV033C and is the factory-recommended migration path. Please refer to the S29AL032D datasheet for specifications and ordering information. Availability of this document is retained for reference and historical purposes only. ...

Page 4

... GENERAL DESCRIPTION The Am29LV033C Mbit, 3.0 Volt-only Flash memory organized as 4,194,304 bytes. The device is offered in 63-ball FBGA and 40-pin TSOP packages. The byte-wide (x8) data appears on DQ7–DQ0. All read, program, and erase operations are accomplished using only a single power supply. The device can also be programmed in standard EPROM programmers ...

Page 5

... For More Information .............................................. 1 General Description . . . . . . . . . . . . . . . . . . . . . . . . 4 Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 6 Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 7 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Ordering Information . . . . . . . . . . . . . . . . . . . . . . 10 Standard Products ................................................ 10 Table 1. Am29LV033C Device Bus Operations ..........11 Requirements for Reading Array Data ................. 11 Writing Commands/Command Sequences .......... 11 Accelerated Program Operation ........................... 12 Program and Erase Operation Status .................. 12 Standby Mode ...................................................... 12 Automatic Sleep Mode ......................................... 12 RESET#: Hardware Reset Pin ...

Page 6

... V Detector CC A0–A21 2.7–3 Sector Switches Erase Voltage Generator PGM Voltage Generator Chip Enable Output Enable Logic Y-Decoder STB Timer X-Decoder Am29LV033C Am29LV033C -70 -90 -120 70 90 120 70 90 120 – DQ0 DQ7 Input/Output Buffers Data STB Latch Y-Gating Cell Matrix ...

Page 7

... SS A20 3 A19 4 A10 5 DQ7 6 DQ6 7 DQ5 8 DQ4 A21 12 DQ3 13 DQ2 14 DQ1 15 DQ0 22268B5 September 12, 2006 40-Pin Standard TSOP 40-Pin Reverse TSOP Am29LV033C A17 A20 37 A19 36 A10 DQ7 35 DQ6 34 DQ5 33 DQ4 A21 28 DQ3 27 DQ2 DQ1 26 25 DQ0 A16 ...

Page 8

... A18 A6 A5 DQ0 CE# Flash memory devices in FBGA packages may be damaged if exposed to ultrasonic cleaning methods. The package and/or data integrity may be compromised if the package body is exposed to temperatures above 150°C for prolonged periods of time. Am29LV033C L8 M8 NC* NC A20 V NC* NC DQ6 DQ7 J5 K5 ...

Page 9

... Ready/Busy output ACC = Hardware Acceleration Pin V = 3.0 volt-only single power supply CC (see Product Selector Guide for speed options and voltage supply tolerances Device ground Pin not connected internally 22268B5 September 12, 2006 LOGIC SYMBOL 22 A0–A21 CE# OE# WE# RESET# ACC Am29LV033C 8 DQ0–DQ7 RY/BY# 7 ...

Page 10

... Reverse Pinout (TSR040 63-ball Fine-Pitch Ball Grid Array (FBGA) 0.80 mm pitch package (FBD063) SPEED OPTION See Product Selector Guide and Valid Combinations Valid Combinations for FBGA Packages Order Number AM29LV033C-70 AM29LV033C-90 AM29LV033C-120 Am29LV033C Package Marking WDI, L033C70V I, F WDF WDI, L033C90V ...

Page 11

... The register is composed of latches that store the commands, along with the address and data informa- tion needed to execute the command. The contents of Table 1. Am29LV033C Device Bus Operations Operation Read Write (Note 1) Standby ...

Page 12

... Flash memory. If RESET# is asserted during a program or erase op- eration, the RY/BY# pin remains a “0” (busy) until the internal reset operation is complete, which requires a Am29LV033C ± 0 but not within IH ) for read access when the de- CE Pin” ...

Page 13

... Embedded Algo- READY rithms). The system can read data t SET# pin returns Table 2. Am29LV033C Sector Address Table (Sheet Sector A21 A20 SA0 0 0 SA1 0 ...

Page 14

... Table 2. Am29LV033C Sector Address Table (Sheet Sector A21 A20 SA34 1 0 SA35 1 0 SA36 1 0 SA37 1 0 SA38 1 0 SA39 1 0 SA40 1 0 SA41 1 0 SA42 1 0 SA43 1 0 SA44 1 0 SA45 1 0 SA46 1 0 SA47 1 0 SA48 1 1 SA49 1 1 SA50 ...

Page 15

... ID A9. Address pins A6, A1, and A0 must be as shown in Table 3. In addition, when verifying sector protection, the sector address must appear on the appropriate highest order address bits. Table 3 Table 3. Am29LV033C Autoselect Codes (High Voltage Method) Description CE# Manufacturer ID: AMD L Device ID: Am29LV033C L Sector Protection Verification ...

Page 16

... Kbytes 192 (4x64) Kbytes 64 Kbytes Notes: 1. All protected sectors unprotected. 2. All previously protected sectors are protected once again. Figure 1. Temporary Sector Unprotect Operation Am29LV033C 16). . During this mode, formerly protected ID is removed from the RE- ID Figure 1, on page 16 shows the algo- ...

Page 17

... Reset PLSCNT = 1 Increment PLSCNT No Yes PLSCNT = 1000? Yes Device failed Sector Unprotect Algorithm Figure 2. In-System Sector Protect/ Unprotect Algorithms Am29LV033C START PLSCNT = 1 RESET Wait 1 μs No First Write Temporary Sector Cycle = 60h? Unprotect Mode Yes No All sectors protected? Yes ...

Page 18

... Table 5. CFI Query Identification String Query Unique ASCII string “QRY” Primary OEM Command Set Address for Primary Extended Table Alternate OEM Command Set (00h = none exists) Address for Alternate OEM Extended Table (00h = none exists) Am29LV033C is greater than WE initiate a write cycle, IH ...

Page 19

... Max. number of byte in multi-byte write = 2 (00h = not supported) Number of Erase Block Regions within device Erase Block Region 1 Information (refer to the CFI specification or CFI publication 100) Erase Block Region 2 Information Erase Block Region 3 Information Erase Block Region 4 Information Am29LV033C N µs N µs (00h = not supported ...

Page 20

... Not Supported Number of sectors in per group Sector Temporary Unprotect Supported Sector Protect/Unprotect scheme 01 = 29F040 mode 29F016 mode 29F400 mode 29LV800A mode Simultaneous Operation Not Supported Burst Mode Type Not Supported Supported Page Mode Type Not Supported Word Page Word Page Am29LV033C 22268B5 September 12, 2006 ...

Page 21

... The system can deter- mine the status of the program operation by using DQ7, DQ6, or RY/BY#. See on page 26 for information on these status bits. Am29LV033C shows the address and 15, which is intended on address ID for valid sector addresses. ...

Page 22

... The system is not required to provide any con- trols or timings during these operations. page 25 shows the address and data requirements for the chip erase command sequence. Am29LV033C for timing diagrams. START Write Program Command Sequence Data Poll ...

Page 23

... DQ7, or DQ6 and DQ2 together, to determine if a sector is actively erasing or is erase-suspended. See “Write Operation Status” on page 26 “DQ3: Sector tion on these status bits. Am29LV033C section.) The time-out be- “Write Operation Status” illustrates the algorithm for the “Erase/Program Opera- tables in the “AC Characteristics” ...

Page 24

... Command Sequence Data Poll from System No Data = FFh? Erasure Completed Notes: 1. See Table 9, on page 25 2. See “DQ3: Sector Erase Timer” on page 28 information. Figure 4. Erase Operation Am29LV033C Embedded Erase algorithm in progress Yes for erase command sequence. for more 22268B5 September 12, 2006 ...

Page 25

... Table 9. Am29LV033C Command Definitions Command Sequence (Note 1) Addr Data Addr Data Read (Note Reset (Note 6) 1 XXX Manufacturer ID (Note 8) 4 XXX Device ID (Note 8) 4 XXX XXX Sector Protect Verify 4 (Note 9) XXX Byte Program 4 XXX Unlock Bypass 3 XXX Unlock Bypass Program 2 XXX ...

Page 26

... During chip erase, a valid address is any non-protected sector address. 2. DQ7 should be rechecked even if DQ5 = “1” because DQ7 may change simultaneously with DQ5. Figure 5. Data# Polling Algorithm Am29LV033C shows the outputs for Data# Figure 5 shows the Data# Polling al- START ...

Page 27

... DQ5 is high (see the section on DQ5 is, the system should then determine again whether the toggle bit is tog- Am29LV033C shows the outputs for Toggle Bit shows the toggle bit al- “Reading explains the algo- in the “ ...

Page 28

... DQ3 prior to and following each subsequent sector erase command. If DQ3 is high on the second status check, the last command might not have been accepted. Table 10 Am29LV033C START (Note 1) No Toggle Bit = Toggle? Yes ...

Page 29

... DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for further details. 22268B5 September 12, 2006 Table 10. Write Operation Status DQ7 DQ5 (Note 2) DQ6 (Note 1) DQ7# Toggle 0 0 Toggle toggle 0 Data Data Data DQ7# Toggle 0 for more information. Am29LV033C DQ2 DQ3 (Note 2) RY/BY# N/A No toggle 0 1 Toggle 0 N/A Toggle 1 Data Data 1 N/A N ...

Page 30

... CC V for full voltage range +2 3 Operating ranges define those limits between which the func- tionality of the device is guaranteed +2 +0 2.0 V Figure 8. Maximum Positive Am29LV033C ). . . . . . . . . . . .0°C to +70° .–40°C to +85° .–55°C to +125° Overshoot Waveform 22268B5 September 12, 2006 ...

Page 31

... IH V pin CC 0 3.0 V ± 4.0 mA min I = –2 min I = –100 µ min is ±5.0 µ max Typical specifications are for V IH ACC Am29LV033C Min Typ Max Unit ±1.0 µA 35 µA ±1.0 µ 0.2 5 µA 0.2 5 µA 0.2 5 µ –0.5 0 0.3 V ...

Page 32

... Note: Addresses are switching at 1 MHz Figure 9. I Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 Note ° 1500 2000 2500 Time Frequency in MHz Figure 10. Typical I vs. Frequency CC1 Am29LV033C 3000 3500 4000 3 22268B5 September 12, 2006 ...

Page 33

... Output timing measurement reference levels INPUTS Steady Changing from Changing from Does Not Apply Center Line is High Impedance State (High Z) Measurement Level Figure 12. Input Waveforms and Measurement Levels Am29LV033C -70 -90, -120 Unit 1 TTL gate 30 100 L 5 0.0–3.0 1.5 1.5 ...

Page 34

... Test Setup Read Toggle and Data# Polling for test specifications Addresses Stable t ACC OEH t CE HIGH Z Output Valid Figure 13. Read Operations Timings Am29LV033C Speed Option -70 -90 -120 Unit Min 70 90 120 ns IL Max 70 90 120 ns IL Max 70 90 120 ns IL ...

Page 35

... RY/BY# CE#, OE# RESET# 22268B5 September 12, 2006 Test Setup Ready Reset Timings NOT during Embedded Algorithms Reset Timings during Embedded Algorithms t Ready t RP Figure 14. RESET# Timings Am29LV033C All Speed Options Unit Max 20 µs Max 500 ns Min 500 ns Min 50 ns Min 20 µs Min 0 ...

Page 36

... BUSY Notes: 1. Not 100% tested. 2. See the “Erase and Programming Performance” on page -70 Min Min Min Min Min Min Min Min Min Min Min Typ Typ Typ Min Min Max section for more information. Am29LV033C Speed Option -90 -120 Unit 70 90 120 ...

Page 37

... V CC Note program address program data ACC t VHH Figure 16. Accelerated Program Timing Diagram 22268B5 September 12, 2006 WPH A0h t BUSY is the true data at the program address. OUT Figure 15. Program Operation Timings Am29LV033C Read Status Data (last two cycles WHWH1 Status D OUT VHH 35 ...

Page 38

... Note sector address (for Sector Erase Valid Address for reading status data (see page 26). Figure 17. Chip/Sector Erase Operation Timings XXXh for chip erase WPH t DH 55h 30h 10 for Chip Erase t BUSY Am29LV033C Read Status Data WHWH2 In Complete Progress t RB “Write Operation Status” on 22268B5 September 12, 2006 ...

Page 39

... Valid Status Valid Status (first read) (second read) Enter Erase Suspend Program Erase Erase Suspend Suspend Read Program Figure 20. DQ2 vs. DQ6 Am29LV033C VA High Z Valid Data True High Z True Valid Data VA VA Valid Status Valid Data (stops toggling) Erase Resume Erase Erase ...

Page 40

... RESET# Setup Time for Temporary t RSP Sector/Sector Block Unprotect Note: Not 100% tested RESET VIDR CE# WE# RY/BY# Figure 21. Temporary Sector/Sector Block Unprotect Timing Diagram Min Min Program or Erase Command Sequence t RSP Am29LV033C All Speed Options Unit 500 ns 4 µs t VIDR 22268B5 September 12, 2006 ...

Page 41

... SA, A6, A1, A0 Sector/Sector Block Protect or Unprotect Data 60h 1 µs CE# WE# OE# Note: For sector protect For sector unprotect 22268B5 September 12, 2006 Valid* 60h Sector/Sector Block Protect: 150 µs, Sector/Sector Block Unprotect Figure 22. Sector Protect/Unprotect Timing Diagram Am29LV033C Valid* Valid* Verify 40h Status 39 ...

Page 42

... Sector Erase Operation (Note 2) WHWH2 WHWH2 Notes: 1. Not 100% tested. 2. See the “Erase and Programming Performance” on page Min Min Min Min Min Min Min Min Min Min Min Typ Typ section for more information. Am29LV033C Speed Option -70 -90 -120 Unit 70 90 120 ...

Page 43

... September 12, 2006 for program SA for sector erase XXX for chip erase Data# Polling GHEL t t WHWH1 CPH t BUSY for program PD for program 55 for erase 30 for sector erase 10 for chip erase = Data Out, DQ7# = complement of data written to device. OUT Am29LV033C PA DQ7# D OUT 41 ...

Page 44

... V, 1,000,000 cycles. CC –100 mA = 3.0 V, one pin at a time. CC Test Setup OUT V IN Test Conditions 150°C 125°C Am29LV033C Unit Comments s Excludes 00h programming prior to erasure (Note 4) s µs Excludes system level µs overhead (Note 5) s 1,000,000 cycles. Additionally, CC, Min Max – ...

Page 45

... PHYSICAL DIMENSIONS* TS 040—40-Pin Standard TSOP * For reference only. BSC is an ANSI standard for Basic Space Centering. 22268B5 September 12, 2006 Am29LV033C Dwg rev AA; 10/99 43 ...

Page 46

... PHYSICAL DIMENSIONS TSR040—40-Pin Reverse TSOP * For reference only. BSC is an ANSI standard for Basic Space Centering. 22268B5 September 12, 2006 Am29LV033C Dwg rev AA; 10/99 44 ...

Page 47

... PHYSICAL DIMENSIONS FBD063—63-Ball Fine-Pitch Ball Grid Array (FBGA Am29LV033C Dwg rev AF; 10/99 22268B5 September 12, 2006 ...

Page 48

... Added Colophon Added reference links Ordering Information Added temperature ranges for Pb-free Package Valid Combinations for TSOP Packages Added new combinations — EF, FF, for package AM29LV033C-70 Added new combinations — EF, EK, FF, FK for pack- ages AM29LV033C-90 and AM29LV033C-120 Am29LV033C 15. Program Figure 17. Chip/Sector 46 ...

Page 49

... Valid Combination for FBGA Packages Added new combinations for Order Number — WDF AM29LV033C-90 and AM29LV033C-120 Added new combinations for Package Marking — F for L033C70V and F, K for L033C90V and L033C120V Revision B+4 (June 7, 2005) Modified EOL disclaimer Cover page and Title page Added notation to superseding documents ...

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