UPD78F4218AGF-3BA Renesas Electronics America, UPD78F4218AGF-3BA Datasheet - Page 39

• Manufacturer Part Number: UPD78F4218AGF-3BA
• Manufacturer: Renesas Electronics America

Specifications of UPD78F4218AGF-3BA

• Lead Free Status / Rohs Status: Supplier Unconfirmed

SCL0 clock frequency
Bus free time (between stop
and start conditions)
Hold time
Low-level width of SCL0 clock
High-level width of SCL0 clock
Setup time of start/restart
conditions
Data hold
time
Data setup time
Rise time of SDA0 and SCL0
signals
Fall time of SDA0 and SCL0
signals
Setup time of stop condition
Pulse width of spike restricted
by input filter
Load capacitance of each bus
line
(3) Serial Operation (T
Notes 1. For the start condition, the first clock pulse is generated after the hold time.
(d) I
Note1
Parameter
2. To fill the undefined area of the SCL0 falling edge, it is necessary for the device to provide an internal
3. If the device does not extend the SCL0 signal low-level hold time (t
4. The high-speed mode I
5. Cb: Total capacitance per bus line (unit: pF)
When using CBUS-
compatible master
When using I
2
C bus mode
SDA0 signal (on V
time t
conditions described below must be satisfied.
• If the device does not extend the SCL0 signal low-level hold time
• If the device extends the SCL0 signal low-level hold time
t
Be sure to transmit the data bit to the SDA0 line before the SCL0 line is released (t
= 1,000 + 250 = 1,250 ns by standard mode I
HD : DAT
SU : DAT
2
C bus
needs to be satisfied.
≥ 250 ns
A
= − − − − 40 to +85° ° ° ° C, V
Symbol
t
t
t
t
t
HD : STA
SU : STA
HD : DAT
SU : DAT
SU : STO
t
t
IHmin.
t
f
HIGH
Cb
LOW
t
CLK
BUF
t
t
SP
R
F
) with at least 300 ns of hold time.
2
C bus can be used in a standard mode I
µ µ µ µ PD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
0
MIN.
Note 2
250
4.7
4.0
4.7
4.0
4.7
5.0
4.0
0
−
−
−
−
Data Sheet U14125EJ3V0DS
DD
Standard Mode
= AV
DD
= 1.9 to 5.5 V, V
MAX.
1,000
100
300
400
−
−
−
−
−
−
−
−
−
−
2
C bus specification)
SS
20 + 0.1Cb
20 + 0.1Cb
= AV
100
0
MIN.
Note 2
1.3
0.6
1.3
0.6
0.6
0.6
Note 4
0
−
0
−
SS
2
LOW
High-Speed Mode
C bus system. In this case, the
= 0 V) (2/2)
Note 5
Note 5
), only the maximum data hold
0.9
MAX.
400
300
300
400
50
Note 3
−
−
−
−
−
−
−
−
Rmax.
+ t
SU : DAT
Unit
kHz
pF
µ s
µ s
µ s
µ s
µ s
µ s
µ s
ns
ns
ns
µ s
ns
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